10th Graduate Student Meeting on Electronic Engineering in Tarragona (Spain)

The Graduate Student Meeting on Electronic Engineering, has been an annual event, created and organized by the Department of Electronic, Electrical and Automatic Control Engineering of the Universitat Rovira i Virgili (URV, Tarragona, Spain) since 2003. Consist of two days of plenary talks given by invited prestigious researchers about selected topics related to electronic engineering, short talk given by last year Doctoral students presenting their last research results and a poster sessions were master and PhD students in this field presented their work. With this format, the Graduated Student Meeting has become a very useful forum for Master and PhD students as well as researchers in the field of Electronic Engineering.

The 10th  Graduate Student Meeting on Electronic Engineering will be held at the Campus of the Universitat Rovira (Tarragona, Spain) from June 22 to 23 2012. Registration is free.

So we encourage graduated students working in the topics:

• Nanoelectronics and Nanophotonics
• Micro and Nanosystems
• Power Electronics & Renewable Energy Systems
• Signal Processing and Data Mining
• Automatic Control

To submit their recent work to be considered for acceptance and published in the book of Abstracts of the Meeting. The deadline for abstracts reception is June 8^th.

Registration is free!

The invited lectures and lecturers will be:

Thermal modeling and simulation

Dr. Goce Arsov,, Ss Cyril and Methodius University, Skopje, Macedonia

Analysis of a chaotic motion of a linear switched reluctance motor

Dr. Bruno Robert, Université de Reims Champagne-Ardenne, France

Hydrothermal synthesis and the Influence of Hydrothermal Reaction Parameters on the Morphology and Dimensions of Sodium Titanate and MnO2 nanostructures

Dr. Polona Umek, Jožef Stefan Institute, Ljubljana, Slovenia

Advances in Nanoelectronics and Functional Diversifications

Dr. Simon Deleonibus, CEA-LETI, MINATEC, Grenoble 38054, France

Knowledge Discovery by Accuracy Maximization

Dr. Stefano Cacciatore, CERM, University of Florence, Italy

Porous silicon for the construction of biosensors and for biomedical applications

Dr. Frédérique Cunin, Institut Charles Gerhardt Montpellier, France


As you can see, some of the lectures are related to device modeling.

Besides, the 10th Graduate Student Meetiong will be held in conjunction with two more interesting events, which also will take place in Tarrgona:

1) The 8th International Conference on Organic Electronics (ICOE): June 25-27 2012.

2) The 2nd Training Course on Compact Modeling (TCCM), June 28-29 2012.

2nd Training Course on Compact Modeling: Registration open

Building on the success of its first edition in 2012, the 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012. It will be organized by will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona).. The General Chairman is Prof. Benjamin Iñiguez.



The Training Course on Compact Modeling will consist of 12 of lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.


REGISTRATION IS OPEN. It is quite cheap:



Advanced Registration (before June 16)
Students: 100 euro
Non-Students: 130 euro
COMON Members: FREE


On-Site Registration (after June 16)
Students: 150 euro
Non-Students: 180 euro
COMON Members: FREE

NOTE: The gala dinner is included in the registration price.

 Registration includes lunches, coffe breaks and a Gala Dinner on June 28, in a nice restaurant with TV screens to watch the Semifinals match of the Soccer European Cup ...

There will be a 50% discount for all members that participate in the SQWIRE FP/ EU project, as well as the participants to the 8th International Conference on Organic Electronics (ICOE 2012).


The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee.

The programme of the 2nd Training Course on Compact Modeling is:

Thursday, June 28
8:30	Benjamin Iñiguez - Universitat Rovira i Virgili (Tarragona, Spain)
	Training Courses Opening Session
8:55	Raphaël Clerc - Institut National Polytechnique de Grenoble (Grenoble, France)
	"Tunnel and quasi-ballistictransport modelling in nanoscale MOS devices"
10:05	Jamal Deen - McMaster University (Hamilton, Ontario, Canada)
	"High frequency noise modeling"
11:15	Coffee Break
11:40	Romain Ritzenthaler - IMEC (Leuven, Belgium)
	"3D analytical modelling techniques for Tri-Gate MOS structures"
12:50	Franz Sischka - Agilent Technologies (Böblingen, Germany)
	"S-parameter and nonlinear RF modelling"
14:00	Lunch
15:15	Frédéric Martinez - Université de Montpellier 2 (Montpellier, France)
	"Low frequency noise modeling"
16:25	David Jiménez - Universitat Autònoma de Barcelona (Barcelona, Spain)
	"Quantum confinement models for nanoelectronic devices"
20:30	Gala Dinner
Friday, June 29
8:45	Giovanni Ghione - Politecnico di Torino (Torino, Italy)
	"Thermal modelling of RF and microwave devices"
9:55	Colin C. McAndrew - Freescale Semiconductors (Phoenix, AZ, USA)
	"Statistical modelling techniques"
11:05	Coffee Break
11:30	Antonio Cerdeira - CINVESTAV (Mexico D.F., Mexico)
	"Design-oriented compact modelling for Multi-Gate MOS devices"
12:50	Mike Brinson - Metropolitan University of London (London, UK)
	"QucsStudio: A second generation Qucs software package for compact semiconductor devicemodel development based on interactive and compiled equation-defined modellingtechniques plus circuit simulation"
14:00	Lunch
15:15	Thomas Gneiting - AdMOS GmbH (Frickenhausen, Germany)
	"Flicker noise measurements and characterization"
16:25	Peter Lee - Elpida Memory (Japan) and vice-chair of the Compact Modeling Council
	"World-wide Model Standardization at the CMC, and DRAM Modeling Needs"
17:35	Conclusions and announcements

Besides, on June 25-27 the same group at URV will organize 8th International Conference on Organic Electronics (ICOE 2012) also in Tarragona. Participants to this Training Course will have a reduced fee for ICOE 2012.


Last but not least, the 10th Graduate Student Meeting on Electronic Engineering will be hels at URV Campus, Tarragona, from June 21 to 22. This event consist of two days of plenary talks given by invited prestigious researchers about selected topics related to electronic engineering, short talk given by last year Doctoral students presenting their last research results and a poster sessions were master and PhD students in this field presented their work. With this format, the Graduated Student Meeting has become a very useful forum for Master and PhD students as well as researchers in the field of Electronic Engineering.



Therefore, if you are interested in the three events, you can stay in Tarragona from June 22 to 29, and spoend the weekend there. The night from June 23 to 24 is the St. John's eve, which is well celebrated in Tarragona (in particular, on the beach) as well as in the rest of Catalonia.


Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (its Roman name) was one of the most important cities in the Roman Empire.
On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tàrraco a World Heritage Site.

Tarragona can be easily reached from Barcelona Airport by bus and train. It is about 100 Km South from Barcelona. Besides, Reus Airport (less than 15 Km from Tarragona) receives flights from many European cities in the summer.

Tarragona can be easily reached from Barcelona Airport by bus and train. It is about 100 Km South from Barcelona. Besides, Reus Airport (less than 15 Km from Tarragona) receives flights from many European cities in the summer.

Speaking about Tarraco's climate, the famous Roman poet Virgil wrote: "The climate blends and confuses the seasons singularly, so that all the year seems an eternal spring." Thanks to its temperate climate, with an average yearly temperature of 23ºC, its clean beaches with fine and gloden sand, and its singular artistic and architectural heritage, Tarragona is one of the most important tourism hubs in Europe.

I strongly encourage all people interested in compact modeling to attend the 2nd Training Course on Compact Modeling!

Intel's FinFETs are less fin and more triangle

EE Times staff -- EDN, May 17, 2012

LONDON -- Reverse engineering and analysis consultancy Chipworks Inc  has posted microscope cross-sections of parts of the 22-nm Ivy Bridge processor from Intel that has revealed that the FinFETs, which Intel calls tri-gate transistors, are in fact trapezoidal, almost triangular, in cross-section.

The ICs were 64-bit, four-core Xeon E3-1230 CPUs intended for the server market, which Chipworks (Ottawa, Ontario) said it obtained in Hong Kong, China.

The triangular section is markedly different to the idealized rectangular section that Intel had shown previously in 2011. However, it is not clear whether the non-vertical sides to the fins are a non-critical manufacturing artifact or are deliberately engineered by Intel and have a critical impact on electron mobility or yield.

Gold Standard Simulations Ltd (or GSS base in Glasgow, Scotland), a spin-off from the University of Glasgow led by Professor Ase Asenov as CEO, responded by saying on its Web site: "There is a lot of speculation about the possible advantages and disadvantages of the trapezoidal, or almost triangular, shaped 'bulk' FinFET." GSS has performed a simulation analysis of the FinFET using its statistical 3-D TCAD simulator called Garand.

 

Comparison of the TEM image of one of the FinFETs from Figure 6 of the Chipworks blog (linked above) with the Garand simulation domain of Gold Standard Simulations. 

 
GSS' simulation was used to explore the dependence of threshold voltage on gate length for the trapezoidal Intel transistor and an equivalent rectangular-fin transistor. "Clearly the rectangular fin has better short channel effects. Still, the million-dollar question is if the almost-triangular shape is on-purpose design, or is this, what bulk FinFET technology can achieve in terms of the fin etching?"

The comparisons between dimensionally comparable rectangular and trapezoidal FinFETs are not markedly different but as GSS had no knowledge of doping profiles it assumed a lightly doped channel. At the same time GSS acknowledged that there is a high doping concentration stopper below the fin in the shallow trench isolation (STI) region. "Clearly FinFETs are more complicated devices in terms of understanding and visualization compared to the old bulk MOSFETs," GSS concluded.

This story was originally posted by EE Times.

[mos-ak] C4P 10th MOS-AK/GSA ESSDERC/ESSCIRC Workshop in Bordeaux, Sept. 21, 2012

C4P 10th MOS-AK/GSA ESSDERC/ESSCIRC Workshop in Bordeaux, Sept. 21, 2012
http://mos-ak.org/bordeaux/

Together with the Organizing Committee and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the 10th MOS-AK/GSA Compact Modeling Workshop at the ESSDERC/ESSCIRC Conference in Bordeaux, Sept. 21, 2012.  

The terms of participation, intending participants and authors should also note the following dates: 

• Preannouncement - April 2012
• Call for Papers - May 2012
• Abstract submission deadline - June 2012
• Final Workshop Program - July 2012
• MOS-AK/GSA Workshop - Sept. 21, 2012

Further details and updates: <http://mos-ak.org/bordeaux/> 
Email contact: <workshops@mos-ak.org> 

- with regards - WG (for the MOS-AK/GSA Committee) 

––––––––––––––––––––––––––––––––––---------------- 

MIXDES Special Modeling Sesion Warsaw (PL) May 24-26, 2012

COMON Tranining Course Tarragona (SP) June 28-19, 2012 

MOS-AK/GSA Bordeaux (F) Sept.21, 2012 

MOS-AK/GSA San Francisco, CA Q4 2012 

––––––––––––––––––––––––––––––––––---------------- 

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[mos-ak] MOS-AK/GSA Dresden workshop on-line publications

MOS-AK/GSA Dresden workshop on-line publications are available, visit: 

http://www.mos-ak.org/dresden/

The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, held its annual spring workshop on April 26-27, 2012 at the Design Automation Division EAS of the Fraunhofer Institute for Integrated Circuits IIS in Dresden, Germany. More than 50 international academic researchers and modeling engineers attended four sessions to hear 16 technical compact modeling talks and poster presentations. The MOS-AK/GSA Modeling Working Group organized the event supported by Joachim Haase Fraunhofer IIS/EAS in Dresden, and a complementary X-FAB clean room visit, poster session and open networking event was hosted by Alexander Petr, X-FAB in Dresden.

As a result of an unfolded compact modeling discussion, the MOS-AK Group followed recommendation of Alexander Petr, X-FAB, a member of the Extended MOS-AK/GSA Compact Modeling Committee, to create a compact modeling open directory (CMOD:http://mos-ak.org/open_dir/). The directory will list available SPICE/Compact models including Verilog-A models for an extensive range of the semiconductor devices. The MOS-AK/GSA Group believes that the CMOD initiative will also stimulate further compact model developments for inter domain technologies and multidisciplinary applications.

The MOS-AK/GSA Dresden Press Note can be found here: 

http://www.gsaglobal.org/news/article.asp?article=2012/0507

and selected workshop photos are here:

http://mos-ak.org/dresden/photos.php

I hope, we would have a next chance to meet us with your academic and industrial partners at future MOS-AK/GSA modeling events (check the list below).

- with regards - WG (for the MOS-AK/GSA Committee) 

––––––––––––––––––––––––––––––––––---------------- 

MIXDES Special Modeling Sesion Warsaw (PL) May 24-26, 2012

COMON Tranining Course Tarragona (SP) June 28-19, 2012 

MOS-AK/GSA Bordeaux (F) Sept.21, 2012 

MOS-AK/GSA San Francisco, CA Q4 2012 

––––––––––––––––––––––––––––––––––---------------- 

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Programme of the 2nd Training Course on Compact Modeling

The 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012.
 It will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona)..
The General Chairman is myself, Prof. Benjamin Iñiguez.

The Training Course on Compact Modeling will consist of l2 lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.
Attendees will  get very useful information on the different aspects of advenced device modelling. This training course is therefore recommended to Master and Ph D students, as well as postdocs and early stage researchers in companies, and not necessarily doing research on modelling.

Here is the final programme of the Training Course on Compact Modeling

8:30   Training Courses Opening Session            Benjamin Iniguez (Universitat Rovira i Virgili, Tarragona, Spain) 8:55  "Tunnel and quasi-ballistic transport modelling in nanoscale MOS devices".          Raphaël Clerc (Institut National Polytechnique de Grenoble, France) 11:15 Coffee break 11:40 "3D analytical modelling techniques for Tri-Gate MOS structures"             Romain Ritzenthaler (IMEC, Belgium) 12:50 "S-parameter and nonlinear RF modelling"             Franz Sischka (Agilent Technologies, Böblingen, Germany) 14:00   Lunch 15:15   "Low frequency noise modeling"             Frédéric Martinez (Université de Montpellier 2, France) 16:25 Quantum confinement models for nanoelectronic devices           David Jiménez (Universitat Autònoma de Barcelona, Spain) 20:30    Gala dinner    June 29 2012 8:45   "Thermal modelling of RF and microwave devices"         Giovanni Ghione (Politecnico di Torino, Italy) 9:55  "Statistical modelling techniques"         Colin C. McAndrew (Freescale Semiconductors, Phoenix, AZ, USA) 11:05  Coffee break   11:30 High frequency noise modeling           Jamal Deen (McMaster University, Canada) 12:50  "QucsStudio: A second generation Qucs software package for compact semiconductor device model development based on interactive and compiled equation-defined modelling techniques plus circuit simulation"            Mike Brinson (Metropolitan University of London, UK) 14:00   Lunch 15:15  "Flicker noise measurements and characterization"            Thomas Gneiting (AdMOS GmbH, Frickenhausen, Germany) 16:25 "World-wide Model Standardization at the CMC, and DRAM Modeling Needs"             Peter Lee (vice-chair of the Compact Modeling Council, Elpida Memory, Japan) Look at: http://compactmodelling.eu/tccm2_programme.php The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee. Registration will be cheap, in particular before June 16 : http://compactmodelling.eu/tccm2_registration.php and will include lunches, coffee breaks and a Gala Dinner on June 28th.

[book] Lectures on the modeling elements of integrated circuits in microelectronics

Лекции по моделированию элементов интегральных схем микроэлектроники
Игорь Иванович Абрамов
ISBN: 978-3-8484-8201-6
LAP Lambert Academic Publishing (2012-04-11)

[mos-ak] MOS-AK/GSA India workshop on-line publications

MOS-AK/GSA India workshop on-line publications are available, 

visit: 

http://www.mos-ak.org/india/

The Workshop was co-organized by Indian National Academy of Engineering (INAE), supported by Ministry of Communication and IT (DIT), Government of India, Council of Scientific and Industrial Research (CSIR); Jaypee Institute of Information Technology (JIIT), Noida; with sponsorship provided by the microelectronic and semiconductor industry leaders: AMS, IBM, TI, STM, Cadence, Mentor Graphics and Masamb.

I would like to thank all MOS-AK/GSA speakers for sharing their compact modeling competence, R&D experience and delivering valuable MOS-AK/GSA presentations. I am sure, that our modeling event in Noida was a beneficial on to all the attendees as well as to all MOS-AK/GSA Group.

The MOS-AK India workshop press coverage is listed below

http://mos-ak.org/india/press.php

I hope, we would have a next chance to meet us with your academic and industrial partners at future MOS-AK/GSA modeling events (check the list below).

- with regards - WG (for the MOS-AK/GSA Committee) 

––––––––––––––––––––––––––––––––––---------------- 

MOS-AK/GSA Dresden April 26-27, 2012 

MIXDES Special Modeling Sesion Warsaw May 24-26, 2012 

MOS-AK/GSA Bordeaux Sept.21, 2012 

MOS-AK/GSA San Francisco Q4 2012 

––––––––––––––––––––––––––––––––––----------------

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PhD course on Nano-scale MOS transistors

Semi-classical modeling and applications
Udine, May 28 - June 1, 2012

Luca Selmi, David Esseni, Pierpaolo Palestri
DIEGM, Università degli Studi di Udine

The course aims at giving a description (in terms accessible to both physicists and electronic engineers) of advanced models for modern nano-MOSFET architectures exploiting technology boosters (strain, high-k materials, etc.) for enhanced channel mobility and reduced leakage. The prerequisite knowledge in physics is limited to the basic concepts of classical electrostatics and electrodynamics and elementary notions of quantum mechanics.

All information dealing with the application for such a scholarship and the eligibility criteria can be found on
http://www.euro-dots.org/Students-rules.asp
and
http://www.euro-dots.org/Students-steps.asp

To register, please call +39 0432 558251 or e-mail it to palestri@uniud.it

DEADLINE FOR ADVANCED REGISTRATION: APRIL 28, 2012

4th Regional Seminar "Computer simulation and design of micro- nano- and microelectromechanical systems"

Natural Sciences Faculty FSEIHPE "State University - teaching, research and production complex"
Physics Department
Teaching and research laboratory instrument-technological modeling of micro-and nano-electronics 

March 30, 2012, Orel, Naugorskoe Av. 29

Seminar Program [translated by Google] 

1. S. Matyukhin ^1, Welcome to the participants
   ¹ State University-UNPK
2. ^A VO Turin, ² Zebra G.I.2 ³ Dorofeev, AA, Device-technological simulation of self-heating in GaN HEMT ,
   ^1-UNPK State University,
   ² NRNU "MiFi"
   ³ 3FGUP NPP "Pulsar"
3. ^A VO Turin, ² Zebra GI, ³ Inigez B3, ^4, Shur MS, Correct account of non-zero differential conductivity in a compact model of MOSFET in saturation due to self-heating effect and because korotkokanalnyh effects ,
   ^1-UNPK State University,
   ² NRNU "MiFi"
   ³ University of Rovira and Virginia, Spain,
   ⁴ Rensselaerovsky Polytechnic Institute, USA
4. Garanovich D. Drozdov, DG, EM Savchenko Design devices from electrostatic discharge protection for bipolar integrated circuits ,
   FSUE NPP "Pulsar"
5. Drozdov, DG, EM Savchenko, Siomko VO Study of models for the calculation of heterostructure transistors based on AlGaN / GaN
   FSUE NPP "Pulsar"
6. Siomko VO, Drozdov, DG, EM Savchenko, Research methods for calculating the breakdown voltage of transistors based on heterostructures AlGaN / GaN
   FSUE NPP "Pulsar"
7. A Kozil Z., S. Birner 2, 3 Dupuis, AR, Nextnano: device-technological modeling of transport in quantum well semiconductor lasers with a double restriction
   ^1-UNPK State University,
   ² Walter Schottky Institut, Technische Universität Munchen, Germany,
   ³ Matco Industries Inc., Scarborough, Ontario, Canada
8. Kozil Z., Differential resistance characteristics of the current-voltage characteristics of semiconductor lasers with a double restriction and optical efficiency
   State University-UNPK
9. Titushkin DA, Matyukhin SI, Modeling of electron-optical system, light-emitting diodes in the package Sentaurus TCAD software company Synopsys ,
   State University-UNPK
10. Makulevsky GR, Malyj DO, Matyukhin S., Investigation of the dependence of characteristics of RO DHS laser waveguide structure by taking into account the thermal effects ,
    State University-UNPK
11. Malyj DO, Makulevsky G.R, Matyukhin SI, Effect of heat on the electrical and optical characteristics of semiconductor lasers, DHS PO using the instrument-technological methods of modeling
    State University-UNPK
12. Tsyrlov AM, Cherkasov, MA, Technical requirements for analysis tools and simulation of high-power devices, switching equipment ,
    JSC «Proton»
13. Chernyshov, KN, Matyukhin S., Computer simulation of the diffusion technology of IGBT ,
    State University-UNPK
14. ^1.2 AA Pisarev, ^a Matyukhin SI, ² Stavtsev AV Computer simulation of the thyristor
    ^1-UNPK State University,
    ² ZAO "Proton-Electrotex"
15. ^A Stoudennikov AS, ^a Turin VO ² Tsyrlov AM, Compact modeling of silicon vertical MOSFET with double diffusion in the program Quite Universal Circuit Simulator
    ^1-UNPK State University,
    ² of "Proton"
16. ¹ Turin, VO, VV Ivanov ^{1, 2} Tsyrlov AM, ³ Martemyanov IS, Simulation of a silicon vertical MOSFET with double diffusion in the program Synopsys TCAD ,
    ^1-UNPK State University,
    ² of "Proton"
    ³ ETU "LETI" 

Job Offer for Compact Modeling (april, 2012)

Remember: we are only re-posting this information, and we're not related to the offer in any other form.

Device Modeling / Compact Modeling Lead / Manager

A top tier Research Group of Semiconductor MNC - Client of HanDigital - Bangalore (Bengaluru Area, India)

Job Description

• Manage and lead a strong technical team to effectively
• Develop compact models for FETs and passive devices like diodes, resistors, inductors , capacitors
• Design testsites and define test programs for RF/DCcharacterization
• Work closely with globally integrated team ofdevice modelers, technology developers and circuit designers
• Client interfacing to address concerns on device models, PDK or circuit performance.

Desired Skills & Experience

Experience : PhD with 10 to 12 Yrs / MS with 12 to 15 Yrs
 
Total Years of relevant experience :Minimum 5 or more years of experience in Device Modeling ; Hands-on experience with RF device / circuit design  and characterization.
 
Technical Knowhow required for the job

• Strong background in semiconductor device physics and characterization particularly in silicon platform is required
• Familiarity with industry standard BSIM or PSP models
• Experience with EDA tools like Cadence, Spectre, HSpice and ADS

Additional Details :

• Excellent written & oral communication skills
• Excellent Technical leadership skills
• Direct working experience with foundries ( Desired ,  Not a Mandatory )

Company Description

Our client is Bangalore based research center is responsible for the definition and development of industry leading technologies such as Copper Interconnect, Silicon onInsulator (SOI), High-Performance Logic-Based Embedded DRAM technologies, and SiGe for RF and analog applications, and high-k material technologies.
 
The research group is also the leading organization in defining the most advanced technologies forthe 45 nm and 22 nm nodes, including research in various aspects of Lithography, strained silicon, and Magnetic RAM (MRAM). The research center develops all of semiconductor technologies including SOI, Bulk CMOS, RFCMOS, HVCMOS,SiGe HBT BiCMOS, and nanodevice technologies.

Additional Information

Posted:

April 5, 2012

Type:

Full-time

Experience:

Mid-Senior level

Functions:

Research, Engineering, Design 

Industries:

Semiconductors 

Compensation:

Best in the Industry

Referral Bonus:

• Applicable

Employer Job ID:

Device / Compact Modeling Manager

Job ID:

2815431

Job Offer in SanDisk (april, 2012)

Remember: we are only re-posting this information, and we're not related to the offer in any other form.

IBIS Models Design Engineer

SanDisk - Bangalore, India (Bengaluru Area, India)

Job Description

In this position, the individual will work in the NAND Flash team to generate IBIS models for the NAND IO’s to be finally used by the internal System team & external customers. In this highly visible role you will perform the following duties:

• Develop IBIS models for the Legacy and DDR IO’s.
• Develop HSPICE models for Legacy and DDR IO’s.
• Interact with the US & the India team.
• Over a period of time develop a team for IBIS models.
• Develop an automated methodology on developing the models

Desired Skills & Experience

This position requires a Bachelor or Master Degree in Electrical/ (Micro) Electronics / VLSI Engineering or equivalent. 2 to 8 years of experience in IBIS models development for the complex Input/Output Buffers. Understanding about the functionality of complex IO’s.Should have deep understanding about HSPICE simulators & IBIS tools e.g Magma Silicon Smart. Excellent Team player.

Company Description

SanDisk Corporation is the global leader in flash memory cards - from research, manufacturing and product design to consumer branding and retail distribution. SanDisk's product portfolio includes flash memory cards for mobile phones, digital cameras and camcorders; digital audio/video players; USB flash drives for consumers and the enterprise; embedded memory for mobile devices; and solid state drives for computers. SanDisk is a Silicon Valley-based S&P 500 company, with more than half its sales outside the United States.

Additional Information

Posted:

April 4, 2012

Type:

Full-time

Experience:

Mid-Senior level

Functions:

Engineering 

Industries:

Semiconductors 

Job ID:

2809898

[mos-ak] C4P MOS-AK/GSA Dresden Workshop (April 26-27, 2012)

Together with the Fraunhofer IIS, local organizer and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the MOS-AK/GSA Dresden Workshop at Fraunhofer IIS, Zeunerstraße 38, D-01069 Dresden on April 26-27, 2012; with XFAB visit and networking event.

On-Line free registration is open:

http://mos-ak.org/dresden/registration.php

MOS-AK/GSA Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. Topics to be covered include the following:

 * Advances in semiconductor technologies and processing

 * Compact Modeling (CM) of the electron devices

 * Verilog-A language for CM standardization

 * New CM techniques and extraction software

 * CM of passive, active, sensors and actuators

 * Emerging Devices, CMOS and SOI-based memory cells

 * Microwave, RF device modeling, high voltage device modeling

 * Nanoscale CMOS devices and circuits

 * Technology R&D, DFY, DFT and IC Designs

 * Foundry/Fabless Interface Strategies

Speakers tentative list (in alphabetic order) includes:

 * Klaus Gaertner, WIAS Berlin

 * Thomas Gneiting, Admos

 * Joachim Haase, Fraunhofer, IIS

 * Benjamin Iniguez, URV Tarragona

 * Wolfgang Mathis, Uni Hannover

 * Paolo Nenzi, Uni Roma

 * Andrej Rumiantsev, Cascade

 * Franz Sischka, Agilent

 * Jiri Slezak, On-Semi

 * Daniel Tomaszewski, ITE Warsaw

 * Dietmar Warning, Atmel

Intending participants and authors should also note the following deadlines:

 * Call for Papers - Mar. 30, 2012

 * Final Workshop Program - April 10, 2012

 * MOS-AK/GSA Workshop - April 26-27, 2012

On-Line abstracts submission is open:

http://www.mos-ak.org/dresden/abstracts.php

Further details and updates: <http://www.mos-ak.org/dresden> 

Email contact: <dresden@mos-ak.org>

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Introducing the 2012 IEEE Fellows

The IEEE Fellows class for 2012 has been announced on 5 March 2012. The Institute salutes these 329 IEEE senior members from around the world who have been named IEEE Fellows for 2012. They join an elite group of more than 6000 IEEE Fellows, who have contributed to the advancement or application of engineering, science, and technology.

2nd Training Course on Compact Modeling

Building on the success of its first edition in 2012, the 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012. It will be organized by will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona).. The General Chairman is Prof. Benjamin Iñiguez.

The Training Course on Compact Modeling will consist of 12 of lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.

The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee.

The preliminary programme is already available at:

http://compactmodelling.eu/tccm2_programme.php

Prof. Raphaël Clerc (INPG, Grenoble, France)

"Tunnel and quasi-ballistictransport modelling in nanoscale MOS devices"

Prof. David Jiménez - Universitat Autònoma de Barcelona (UAB, Barcelona, Spain)

"Analytical quantum modelling of ultimate MOS devices"

Dr. Romain Ritzenthaler (IMEC, Belgium)

"3D analytical modelling techniques for Tri-Gate MOS structures"

Prof. Antonio Cerdeira (CINVESTAV,Mexico)

"Design-oriented compact modelling for Multi-Gate MOS devices"

Dr. Colin C. McAndrew (Freescale Semiconductors, Phoenix, AZ, USA)

"Statistical modelling techniques"

Dr. Thomas Gneiting (AdMOS GmbH, Frickenhausen, Germany)

"Flicker noise measurements and characterization"

Prof. Frédéric Martinez (Université de Montpellier 2, France)

"Low frequency noisemodeling"

Dr. Franz Sischka (Agilent Technologies, Böblingen, Germany)

"S-parameter and nonlinear RF modelling"

Prof. Giovanni Ghione (Politecnico di Torino, Italy)

"Thermal modelling of RF and microwave devices"

Prof. Jamal Deen (McMaster University, Canada)

"High frequencynoise modeling"

Prof. Mike Brinson (Metropolitan University of London, UK)

"QucsStudio: A second generation Qucs software package for compact semiconductor devicemodel development based on interactive and compiled equation-defined modellingtechniques plus circuit simulation"

Registration will be cheap, in particular before June 16 :

http://compactmodelling.eu/tccm2_registration.php

will include lunches, coffee breaks and a Gala Dinner on June 28, in a nice restaurant with TV screens to watch the Semifinals match of the Soccer European Cup ...

Besides, on June 25-27 the same group at URV will organize 8th International Conference on Organic Electronics (ICOE 2012) also in Tarragona. Participants to this Training Course will have a reduced fee for ICOE 2012.

I encourage compact modeling researchers to attend TCCM!

SBMicro symposium 2012

27th SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES CHIP IN BRASÍLIA
August 30 - 02, 2012
Hotel San Marco, Brasilia, DF - Brazil

http://chipinbsb.cic.unb.br/sbmicro.html

Call for Papers: The SBMicro symposium is an international forum dedicated to fabrication and modeling of microsystems, integrated circuits and devices, held annually in Brazil. The goal of the symposium is to bring together researchers in the areas of processing, materials, characterization, modeling, simulation and TCAD of integrated circuits, microsensors, microactuators and MEMS. The SBMicro2012 will be located in Brasília, Brazil. This international conference offers a unique blend of microelectronics and serves as a major conference for the discussion of interdisciplinary research around the world through a variety of formats, such as oral presentations, poster sessions, exhibits, panel discussions, and tutorial sessions. The best papers presented at the symposium will be invited to resubmit an extended version that will be considered for publication at the JICS - Journal of Integrated Circuits and Systems and at the Journal of the Electrochemical Society.

SBMicro2012 will occur in the same venue as SBCCI2012 - 25th Symposium on Integrated Circuits and Systems Design.

Deadline and Paper Format

• Paper Submission Deadline: March 31th, 2012
• Notification of Acceptance : May 18th, 2012
• Camera-Ready Deadline : June 01th, 2012

SBMicro2012 will receive camera-ready submissions in English for consideration by the Program Committee with a maximum of 10 pages. Submission paper format details for SBMicro2012 are available at the conference website http://www.sbmicro.org.br/sbmicro. Simultaneous submissions or submissions of previously published papers will not be considered. The Program Committee will only accept electronics submission in PDF format via the conference website.

Topics of interest include, but are not limited to:

• Semiconductor and MEMS processing;
• Sensors and actuators;
• Optoelectronics and photovoltaic;
• Plasma technology and diagnostics;
• Nanoelectronics;
• Display technology;
• Modeling and simulation;
• Reliability and yield;
• Device characterization;
• Circuit-device interaction;
• Energy harvesting;
• Biomedical devices;
• Power devices;
• Packaging;
• Novel materials and devices;
• Technology roadmaps;

Engineering education.Location: Brasilia was constructed between 1956 and 1960 and inaugurated, as the new Brazilian Capital, in April 21, 1960. Its master plan ("Plano Piloto") was conceived by Lucio Costa, and its major buildings were designed by Oscar Niemeyer. Known internationally for the modernity of its architecture and urban design in the shape of an airplane (or a bird, as Lucio Costa conceived it), Brasilia has been declared by the UNESCO as "World Heritage Site". The city and its District are located in the Central-West region of the country, along a plateau known as Planalto Central.

General Chair
Ricardo Jacobi
UnB - Brazil
jacobi@unb.br

Program Chairs
Gilson Wirth
UFRGS - Brazil
wirth@inf.ufrgs.br

Dragica Vasileska
ASU - USA
vasileska@asu.edu

Local Arrangement Chairs
Carlos Llanos, UnB - Brazil
llanos@unb.br

Tutorials Chair
Henry Boudinov, UFRGS - Brazil

Panels Chair
Sérgio Bampi, UFRGS - Brazil

Finance Chair
Sandro Haddad, UnB - Brazil

Publicity Chair
Jacobus Swart, UNICAMP - Brazil

Publication Chair
Nilton Morimoto, USP - Brazil
Fernanda Kastensmidt, UFRGS - Brazil

Industry Liaison
Saulo Finco, CTI - Brazil
Jones Yudi, UnB - Brazil

Europe Liaison
Patrick Verdonk, IMEC - BE

US Liaison
Fernando Guarin, IBM - USA

LA Liaison
Mariano Aceves, INAOE - MX

SWOT Analysis of the Technology/Design Ecosystem", Lausanne, 30-31 May 2012

NANO-TEC Workshop 3; SWOT Analysis of Technology-Design Ecosystem: The event is part of the Coordination Action funded by the FP7 under the ICT theme, titled “ECOSYSTEMS TECHNOLOGY and DESIGN for NANOELECTRONICS” (NANO-TEC). The project started on 1 September 2010 and it aims at identifying the emerging generation of device concepts and technologies for ICT, as well as to build a joint technology-design community in order to coordinate research efforts in nanoelectronics in the European research area. 

The third workshop will tackle the topics of Solid-state quantum computing, Molecular Electronics, Nanowires, Spintronics, Graphene, MEMS and Neuromorphic Computing; finally, a panel discussion on the bridge in design from technology to application will close the event. All this will lead to the preparation of the fourth and final NANO-TEC workshop, to take place in Autumn 2012, which will provide a set of recommendations on the most promising devices and technologies identified and for future technology-design integration. In preparation for the workshop you can now join the forum available online at the following link: 

https://www.fp7-nanotec.eu/phpBB3/viewforum.php?f=5

BSIMCMG is now the CMC industry standard FinFET SPICE model.

BSIMCMG is now the first industry standard FinFET SPICE model. It is available for download and use at the BSIM website. The voting took place in Jan'12 and the model was approved a standard at the March 1Q12 Osaka CMC Meeting. The CMC is yet to update their website.

FDSOI Workshop presentations available online

CEA-Leti, SOI Industry Consortium and Soitec want to make you aware that the presentations are now posted on the SOI Industry Consortium website:

http://www.soiconsortium.org/corners/fully-depleted-soi/february-2012/index.php

SISPAD'2012 - Second call for papers

Call for Papers

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of the leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures.

Date and Location

• Conference date: September 5-7, 2012
• Abstract submission deadline: April 1, 2012
• Conference location: Sheraton Denver Downtown Hotel, Denver, Colorado, USA
• Webpage: http://www.ece.umd.edu/sispad2012

Topics Original papers are solicited in the following subject areas: Electronic Transport in Semiconductor Materials and Devices Device Modeling and Simulation Sensors, Biosensors and Electromechanical Systems Simulation Process and Equipment Modeling and Simulation Compact Models Physical-Level Circuit Simulation New Algorithms for Process and Device Modeling Simulation of Nano and Quantum Devices User Interfaces and Visualization Simulation of Power Devices Photovoltaics and Other Green Technologies

The abstract should describe the nature of the presentation, together with references. The text must be single-spaced with 11pt or 12pt font. The abstract is limited to two pages including figures, tables and references. Abstracts should be submitted in PDF format.

For more information, please visit:

http://www.ece.umd.edu/sispad2012/

NDES 2012 July 11 – 13, 2012, Wolfenbüttel, Germany

The conference aims at stimulating and enabling scientists from all over the world to exchange know-ledge and ideas in the field of nonlinear dynamics and its applications in a friendly atmosphere. Nonlinear phenomena are observed in diverse areas such as physics, biology, economics, electronics and computer science. The conference will cover cutting-edge research in these highly active fields and explore new perspectives of nonlinear dynamics in interdisciplinary applications. The scope of interest includes, but it is not limited to:

• Theory, analysis, modelling, implementations and applications of nonlinear circuits and systems in science, technology and biology
• Nonlinear network analysis
• Neural networks, neurodynamics, robots 
• Nonlinear signal processing: Time-series analysis, communication, coding
• Nonlinear devices: Sensors, lasers
• Bifurcation and chaos, control and synchronisation
• Geodynamics

Wolfgang Mathis (Conference Chair, Organizing Committee)
Ruedi Stoop (Conference Co-Chair, Organizing Committee)

[read more...]

Papers in March 2012

SP-HV: A Scalable Surface-Potential-Based Compact Model for LDMOS Transistors

Yao, W.  Gildenblat, G.  McAndrew, C. C.  Cassagnes, A. 
Abstract | Full Text: PDF (435KB) 

Applicability of Macroscopic Transport Models to Decananometer MOSFETs

Vasicek, M.  Cervenka, J.  Esseni, D.  Palestri, P.  Grasser, T. 

Abstract | Full Text: PDF (790KB) 

Physics-Based Modeling of GaN HEMTs

Vitanov, S.  Palankovski, V.  Maroldt, S.  Quay, R.  Murad, S.  Rodle, T.  Selberherr, S.

Abstract | Full Text: PDF (1220KB) 

A Compact Analytic Model of the Strain Field Induced by Through Silicon Vias

Jan, S.-R.  Chou, T.-P.  Yeh, C.-Y.  Liu, C. W.  Goldstein, R. V.  Gorodtsov, V. A.  Shushpannikov, P. S. 
Abstract | Full Text: PDF (849KB) 

 

 

A Subthreshold Swing Model for Thin-Film Fully Depleted SOI Four-Gate Transistors

Sayed, S.  Hossain, M. I.  Khan, M. Z. R. 
Abstract | Full Text: PDF (138KB) 

 

 

Statistical Variability in Fully Depleted SOI MOSFETs Due to Random Dopant Fluctuations in the Source and Drain Extensions

Markov, S.  Cheng, B.  Asenov, A. 
Abstract | Full Text: PDF (403KB) 

 

 

The Compact Modeling of Channel Potential in Sub-30-nm NAND Flash Cell String

Kang, M.  Lee, K.  Chae, D. H.  Park, B.-G.  Shin, H. 
Abstract | Full Text: PDF (384KB) 

 

 

Measurement of Source Resistance in Top-Contact Organic Thin-Film Transistors

Singh, V. K.  Agrawal, A. K.  Mazhari, B. 
Abstract | Full Text: PDF (249KB) 

 

 

 

Demystifying Surrogate Modeling for Circuits and Systems

Yelten, M.B.  Zhu, T.  Koziel, S.  Franzon, P.D.  Steer, M.B. 
Abstract | Full Text: PDF (1492KB) 

 

 

 

Teaching Memory Circuit Elements via Experiment-Based Learning

Pershin, Y.V.  Ventra, M.D. 
Abstract | Full Text: PDF (1655KB)