FOSDEM is a free event for software developers to meet, share ideas and collaborate, it was organized for 25th subsequent time at ULB Solbosch Campus, Brussels, Belgium, between Feb. 1-2, 2025. One of FOSDEM DevRooms (conferences sessions) "Open Hardware and CAD/CAM" was organized to review most recent developments of the printed circuit board (PCBs) design tools, circuit (ICs) designs/simulations, 3D modeling and analysis and collaborative and team-based hardware design techniques among many other related activities. The contributors and supporters of the OpenPDK Initiative showcased these remarkable developments:
Árpád Bűrmen: "VACASK and Verilog-A Distiller - building a device library for an analog circuit simulator"
Abstract: VACASK is a novel FOSS analog circuit simulator with a clear separation between device models (i.e. equations) and circuit analyses. It is based on the state of the art KLU sparse matrix library and utilizes the OpenVAF Verilog-A compiler for building its device models from Verilog-A sources. A comparison with other FOSS analog circuit simulators is presented and the roadmap for future development is discussed. A major obstacle in development of VACASK (and every other new simulator) is the implementation of legacy device models that boils down to writing tens of thousands of lines of C code. Legacy device models are used in several older PDKs as well as in models of a large number of discrete electronic components. A novel approach to implementing these device models is proposed: a converter from SPICE3 API-based C code into modern Verilog-A code. The performance of the converted models is compared to that of native SPICE3 models. At the present the converted models can be used in VACASK and Ngspice circuit simulators as well as in any other simulator that supports Verilog-A. The limitations of the approach are discussed. Some alternative use cases for the converter are proposed and a roadmap for its future development is presented.
Holger Vogt: "ngspice - XSPICE elemental devices made available in KiCad"
Abstract: XSPICE code models have been intrgrated into ngspice since starting the ngspice project. Currently 68 device models are available, ranging from simple elements like analog gain cells or digital inverters up to complex ones like a digital state machine, SRAMs, 3D table models or interfaces to digital Verilog building blocks compiled with Verilator. The simulation with digital blocks is fast, since event based. The interface between digital and analog blocks is automated. The use of the XSPICE code models has been hampered a bit due to their specific interfaces and the lack of graphical symbols of its elements for creating user readable circuit diagrams. So I have started a project to provide XSPICE code model support via the well-known KiCad/ngspice integration. It comprises of symbol library and its assiciated device models assembled in a subcircuit model library. In the talk I will inform about its concept and status and will present some application examples
https://forum.kicad.info/t/simulation-with-xspice-code-models/56384 https://sourceforge.net/projects/ngspice/
Felix Salfelder and Al Davis: "Verilog-AMS in Gnucap"
Abstract: Gnucap is a Free versatile and modern, modular, analog and mixed-signal simulator. Verilog-AMS is a standardized behavioural language for analog and mixed-signal systems based on the IEEE 1364-2005 industry standard, commonly known as Verilog. Gnucap was invented to advance circuit simulator technology from around 1985, at the time SPICE was developed (1973-1993) at UC Berkeley. Gnucap was released under GPLv3+ in 2001 to avoid patent issues. Today, proprietary simulators supposedly implement the most efficient algorithms yet inspired by public research from the past century. Meanwhile, the Gnucap project is making progress harvesting the breakthroughs, for use in free/libre software. To address the interoperability across circuit design tools, and across modelling domains, Verilog-AMS was created. Verilog-AMS extends traditional Verilog by analog features known from SPICE, and permits models that interact with both the digital and analog domains. The standard expertly allows for vendor-independent representations of modern circuit designs.
1 In this talk, we will explain the new revision of our proposed IEEE 1364-2005 compliant schematic interchange format, and how seamless interaction will empower FOSS EDA tools. We will outline work in progress, possibly demonstrate an application, and hint at opportunities. We will explain how the interchange will extend towards PCB design and layout2 We will summarise new mixed signal features available in modelgen-verilog. This includes monitored analog events, as well as discrete modelling in terms of user defined primitives. We will expand on the usefulness of discrete disciplines and "connect modules", and give an update on the implementation status.3 On the algorithmic end, we have added a plugin interface for VLSI-ready matrix solvers to the zoo. We will highlight a new solver combining temporal sparsity with the time/space efficiency of "conventional sparse" LU decomposition. We will explain why Gnucap will outpace traditional (open source) solvers on virtually all instances, both small and big circuits.
Abstract: In the field of semiconductor technology, compact modeling, and IC designs, the OpenPDK Initiative provides an international platform for discussing advanced technologies, fostering collaboration among industry and academic leaders in electronic design automation (EDA). We review selected R&D topics presented at a recent event by prominent academic researchers and industrial professionals who presented and discussed innovative approaches in CAD/EDA tools, techniques including compact/SPICE modeling, and IC design that address the demands of emerging semiconductor technology applications. However, the semiconductor industry also faces many challenges in maintaining the growth of its workforce with skilled technicians and engineers. To address the increasing need for well-trained workers worldwide, we must find innovative ways to attract skilled talent and strengthen the local semiconductor workforce ecosystem. The FOSS CAD/EDA tools with the recently available open access PDKs provide a new platform to connect IC design beginners, enthusiasts and experienced mentors to benefit from the collaboration opportunities enabled by the fast-growing open-source IC design movement. The collaborative development of open-source integrated circuit (IC) designs is becoming increasingly feasible due to the rapid expansion of OpenPDKs recently offered by SkyWater, GF and IHP with an open schedule of MPW Runs for FMD-QNC project in 2024-25. This paper demonstrates the FOSS CAD/EDA contribution to the SPICE/Verilog-A modeling/standardization, compete IC design flow (Xschem, Qucs-S, ngspice, Xyce, OpenVAF, OpenEMS, Magic, kLayout, OpenRoad), in addition selected, open-source examples of analog/RF and digital IC designs will be presented.
