Mar 15, 2024

[paper] Topological Transistor Compact Model

Md. Mazharul Islam1, Shamiul Alam1, Md. Shafayat Hossain2, Ahmedullah Aziz1
Compact Model of a Topological Transistor
 IEEE Access; Feb.7, 2024
DOI: 10.1109/ACCESS.2024.3363645

1 Department of Electrical Engineering and Computer Science, The University of Tennessee, USA
2 Department of Physics, Princeton University, USA

Abstract: The precession of a ferromagnet leads to the injection of spin current and heat into an adjacent non-magnetic material. Besides, spin-orbit entanglement causes an additional charge current injection. Such a device has been recently proposed where a quantum-spin hall insulator (QSHI) in proximity to a ferromagnetic insulator (FI) and superconductor (SC) leads to the pumping of charge, spin, and heat. Here we build a circuit-compatible Verilog-A-based compact model for the QSHI-FI-SC device capable of generating two topologically robust modes enabling the device operation. Our model also captures the dependence on the ferromagnetic precision, drain voltage, and temperature with an excellent (>99%) accuracy.

FIG: (a) The proposed device structure. A QSHI in proximity with the FI with a monodomain magnetization m(t) that precesses at an angle θ. In proximity to the FI region there is a SC region The monodomain magnetization m(t) precesses at an angle θ around the axis perpendicular to the QSHI. The QSHI region injects charge, spin, and heat currents to the drain. The injection can be controlled by the applied potential at the FI region (Vg), the precession angle (θ), precession frequency (ω) temperature (T) and drain voltage (Vd ). Zero energy Majorana Fermion (MF) is harbored in the FI-SC interface that controls the pumped currents. (b) Circuit schematics for our simulation process. (c) Methodology flow for compact modeling

Acknowledgement: This work was supported by the Air Force Research Laboratory under Agreement FA8750-21-1-1018.







[paper] Next Wave for AI/ML in Physical Design

Andrew B. Kahng
Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design
ISPD ’24 Proceedings
March 12–15, 2024, Taipei, Taiwan.
DOI 10.1145/3626184.3635277

Abstract: It has been six years since an ISPD-2018 invited talk on “Machine Learning Applications in Physical Design”. Since then, despite considerable activity across both academia and industry, many R&D targets remain open. At the same time, there is now clearer understanding of where AI/ML can and cannot (yet) move the needle in physical design, as well as some of the difficult blockers and technical challenges that lie ahead. Some futures for AI/ML-boosted physical design are visible across solvers, engines, tools and flows and in contexts that span generative AI, the modeling of “magic” handoffs at flow interstices, academic research infrastructure, and the culture of benchmarking and open-source EDA.

Fig: OpenROAD as a new EDA playground for ML researchers

Acknowledgments: Many thanks to Sayak Kundu, Bodhisatta Pramanik, Zhiang Wang and Dooseok Yoon for their help with the figures and text in this paper. Discussions with Siddhartha Nath, Igor Markov, Chuck Alpert and Ilgweon Kang are also gratefully acknowledged. Research at UCSD is partially supported by DARPA, Samsung, the C-DEN center, and gifts from Google, Intel and others.


Mar 11, 2024

Importance of Open-Source EDA Tools for Academia

Importance of Open-Source EDA Tools for Academia
Open Letter on European Strategic and Funding Directions
https://open-source-eda-letter.eu/


Initial Signatories of the Open-Source-EDA-Letter, as of March 8, 2024, are:

Luca Benini
University of Bologna, Italy & ETH Zürich, Switzerland
Professor, Lead of the RISC-V PULP platform

Giovanni De Micheli
EPFL Lausanne, Switzerland
Professor and Director, LSI lab

Marie-Minerve Louërat
Sorbonne University, France
Research Scientist, Coriolis Foundation hosted by CNRS Foundation

Harald Pretl
Johannes Kepler University Linz, Austria
Professor, Maintainer of IIC-OSIC-TOOLS

Stefan Wallentowitz
Hochschule München University of Applied Sciences, Germany
Professor, Director at FOSSi Foundation & Director at RISC-V

All the educators and researchers from European academic institutions are kindly asked to consider and eventually co-sign this open letter. To co-sign, please send a mail from your university mailing address to stefan.wallentowitz@hm.edu and include your affiliation and ideally include a link to your profile.

AACD 2024 Final Program

We are proud to announce the final program
of the 32nd Advances in Analog Circuit Design Workshop (AACD24),
which will be held at University of Pavia, Italy on April, 9th-11th, 2024

Flyer

Registration to AACD24 is open at:
https://www.mbtechnoservices.com/aacd24/index.php?page=Registration.html

For any further information:

We look forward to meeting you in Pavia for this very exciting edition of the AACD Workshop!!!!

Andrea Baschirotto
Piero Malcovati AACD24 Organizing Committee

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Mar 5, 2024

[Open PDK] IEEE EDS DL at IISc Banglare

IEEE EDS/SSCS Bangalore Chapter Presents DL Series

FOSS TCAD/EDA Tools SPICE and Verilog-A
Modeling Flow Technology - Devices - Applications
W.Grabinski, MOS-AK (EU)


DATE AND TIME LOCATION HOSTS
Date: 07 Mar 2024
Time: 04:00 PM to 05:00 PM
All times are (UTC+05:30) Chennai
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Auditorium, Dept. of ESE,
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