2022 SSCS Outstanding Chapter Award

Our SSCS Switzerland Chapter, with Prof. Taekwang Jang as its Chair, was recognized as the outstanding chapter of the year 2022. Dear my fellow Swiss colleagues, the chapter offering the best lectures, seminars, and social events is right at your next door, and you can enjoy them by joining the IEEE SSCS members here.

[C4P] T-ED Special Issue

Call for Papers - Special Issue on "Wide and Ultrawide Band Gap Semiconductor Devices for RF and Power Applications."

The Special Issue of the IEEE Transactions on Electron Devices (T-ED) will report the most advanced and recent results in the field of wide and ultrawide bandgap semiconductor materials and devices, including papers focused on material fabrication, device processing, reliability investigation, device modeling, thermal aspects, and system-related results.

Submission deadline: 31 August 2023
Publication date: February 2024

Submit papers today: https://bit.ly/3fESTgZ

Guest Editors: 

Prof. Matteo Meneghini, University of Padova, Italy 

Prof. Patrick Fay, University of Notre Dame, USA 

Prof. Digbijoy Nath, IISC Bangalore 

Prof. Geok Ing Ng, Nanyang Technical University, Singapore 

Prof. Junxia Shi, University of Illinois, Chicago 

Prof. Shyh-Chiang Shen, Georgia Tech. 

FOSS Verilog-A Models Repository

Dietmar Warning, ngspice team, has announced his new github project VA-Models repository 
<https://github.com/dwarning/VA-Models>

These Verilog-A model code repository is a compilation of the most important models in the state of public FOSS availability. The intention is to have one place for model access and a platform for discussion and integration into simulators.

At the moment, the models will be compiled by script with openVAF and checked with ngspice version 39. Code changes are introduced only for convergence support or to fulfill Verilog-A language standard requirements. Model equations are untouched. But I am open to integrate code modifications for other compiler/simulator companions as far they are inline with actual LRM 2.4. Simple test case are provided, mainly to show general functionality of the compiled models. 

Don't hesitate to contact Dietmar Warning, ngspice team, if there is something wrong, especially in kind of legal aspects. All the contributions are welcome.

How many semiconductor talents are there?

How many semiconductor talents are there? SMIC’s response: It is good to have sufficient reserves for employee benefits–Fast Technology–Technology Changes the Future https://t.co/rQsQls9EOd #semi https://t.co/793nEsMLcF

— Wladek Grabinski (@wladek60) Feb 12, 2023

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from Twitter https://twitter.com/wladek60

February 12, 2023 at 07:36PM
via IFTTT

#Wolfspeed to Build 200-mm #SiC #Wafer #Fab in Germany

#Wolfspeed to Build 200-mm #SiC #Wafer #Fab in Germany https://t.co/WZIzzETJ44 #semi https://t.co/RY58nMQ2B1

— Wladek Grabinski (@wladek60) Feb 9, 2023

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from Twitter https://twitter.com/wladek60

February 09, 2023 at 08:46PM
via IFTTT