#RISC-V grows #opensource #processor membership 130% in 2021 https://t.co/jK3BHOYbrL #semi https://t.co/WNUecB8IH6
— Wladek Grabinski (@wladek60) Dec 3, 2021
from Twitter https://twitter.com/wladek60
December 03, 2021 at 09:47AM
via IFTTT
Dec 3, 2021
#RISC-V grows #opensource #processor membership 130% in 2021 https://t.co/jK3BHOYbrL #semi https://t.co/WNUecB8IH6
from Twitter https://twitter.com/wladek60
December 03, 2021 at 09:47AM
via IFTTT
Dec 1, 2021
#Efabless Corporation shuttle at #SkyWater #Technology #Foundry sponsored by #Google #FOSS #FOSSi #semi #chips #opensource #PDK #MPW https://t.co/qFDu2gyJki
#Efabless Corporation shuttle at #SkyWater #Technology #Foundry sponsored by #Google #FOSS #FOSSi #semi #chips #opensource #PDK #MPW https://t.co/qFDu2gyJki
— Wladek Grabinski (@wladek60) Dec 1, 2021
from Twitter https://twitter.com/wladek60
December 01, 2021 at 10:47AM
via IFTTT
Nov 30, 2021
[Open Hardware] [CfP] Computer Aided Modeling and Design Development Room
We are pleased to announce the CfP for the Open Source Computer Aided
Modeling and Design devroom at FOSDEM 2022, on Saturday, 5 February 2022.
FOSDEM website: https://fosdem.org/2022/
FOSDEM Code of Conduct: https://fosdem.org/2022/practical/conduct/
We hope you'll join us for a full day of talks, demos and interesting
discussions on designing, modeling and testing physical objects using
Open Source tools. This year's event will be fully virtual (:sad trombone:)
and will feature multiple channels for talks, Q&A as well as
hallway discussions (:happy dance:).
We welcome any talk proposals about the creation of physical objects.
Topics of interest include, but are not limited to:
We hope you'll join us for a full day of talks, demos and interesting
discussions on designing, modeling and testing physical objects using
Open Source tools. This year's event will be fully virtual (:sad trombone:)
and will feature multiple channels for talks, Q&A as well as
hallway discussions (:happy dance:).
We welcome any talk proposals about the creation of physical objects.
Topics of interest include, but are not limited to:
- Open Hardware projects
- Circuit Design
* Printed circuit board design tools
* Circuit simulation
- 3d modeling and analysis
* Solid modeling tools
* Meshing, modeling and transforming physical representations
* Finite element analysis
- 3d printing
* 3d slicing tools
* Motor control
- Machine design and integration
* ECAD/MCAD integration
* Thermal analysis
* Wire modeling
- Physical Model Data storage
* Data representation and optimization
* Version control in hardware data storage
* Collaborative and team-based hardware design techniques
Slots will be allocated for short (20 minutes), long (40 minutes)
talks and in-depth (60 minutes). This includes question time, for which
* Printed circuit board design tools
* Circuit simulation
- 3d modeling and analysis
* Solid modeling tools
* Meshing, modeling and transforming physical representations
* Finite element analysis
- 3d printing
* 3d slicing tools
* Motor control
- Machine design and integration
* ECAD/MCAD integration
* Thermal analysis
* Wire modeling
- Physical Model Data storage
* Data representation and optimization
* Version control in hardware data storage
* Collaborative and team-based hardware design techniques
Slots will be allocated for short (20 minutes), long (40 minutes)
talks and in-depth (60 minutes). This includes question time, for which
you should budget at least 20% of your time.
Speakers need to specify their preferred format. Both include time for
questions and answers.
Depending on the number of submissions, submitters may be asked to
utilize an alternate time format.
## The submission process
Please submit your proposals at
https://penta.fosdem.org/submission/FOSDEM22
If you already have a Pentabarf account (for example as a result of
having submitted a proposal in the past), make sure you use it to log in
and submit your proposal. Do not create a new account if you already
have one.
Please include the following information with your submission:
- Abstract
- Preferred Session length
- Speaker bio
- Link to any hardware / code /slides for the talk
When you submit your proposal (creating an "Event" in Pentabarf), make
sure you choose the "Open Source Computer Aided Modeling and Design" in
the track drop-down menu. Otherwise your proposal may go unnoticed.
Fill in at least a title and abstract for the proposed talk and a
suggested duration. Keep in mind that much of the value in these
meetings comes from the discussions, so please allot at least 20%
questions and answers.
Depending on the number of submissions, submitters may be asked to
utilize an alternate time format.
## The submission process
Please submit your proposals at
https://penta.fosdem.org/submission/FOSDEM22
If you already have a Pentabarf account (for example as a result of
having submitted a proposal in the past), make sure you use it to log in
and submit your proposal. Do not create a new account if you already
have one.
Please include the following information with your submission:
- Abstract
- Preferred Session length
- Speaker bio
- Link to any hardware / code /slides for the talk
When you submit your proposal (creating an "Event" in Pentabarf), make
sure you choose the "Open Source Computer Aided Modeling and Design" in
the track drop-down menu. Otherwise your proposal may go unnoticed.
Fill in at least a title and abstract for the proposed talk and a
suggested duration. Keep in mind that much of the value in these
meetings comes from the discussions, so please allot at least 20%
of the talk time for questions and answers.
## Important dates
## Important dates
- Call for papers available: 29 November 2021
- Call for participation closes: 28 December 2021
- Devroom schedule available: 1 January 2022
- Talk recording uploads due: 20 January 2022
- Devroom day: Saturday 5 February 2022 (09:00 to 17:00)
## Recordings
## Recordings
Because this year's conference will be fully virtual, all talks must be pre-recorded. These will be verified for sound and video quality prior to the conference.
Each accepted talk will have a dedicated chaperone to help you through the process of recording, encoding and uploading your talk.
The recordings will be published under the same licence as all FOSDEM
content (CC-BY).
content (CC-BY).
open-hardware-devroom mailing list
open-hardware-devroom@lists.fosdem.org
https://lists.fosdem.org/listinfo/open-hardware-devroom
Nov 27, 2021
[paper] Bridging the gap between design and simulation of low voltage CMOS circuits
C. M. Adornes, D. G. Alves Neto, M. C. Schneider and C. Galup-Montoro
Bridging the gap between design and simulation of low voltage CMOS circuits
2021 IEEE Nordic Circuits and Systems Conference (NorCAS), 2021, pp. 1-5,
DOI: 10.1109/NorCAS53631.2021.9599867
Abstract: This work proposes a simplified MOSFET model based on the Advanced Compact MOSFET (ACM) model, which contains only four parameters to assist the designer in understanding how the main MOSFET parameters affect the design. The 4-parameter model was implemented in Verilog-A to simulate different circuits designed with the ACM model. A CMOS inverter and a ring oscillator were designed and simulated, either using the 4-parameter ACM model or the BSIM model. The simulation results demonstrate that the 4-parameter model is very suitable for ultra-low-voltage (ULV) modeling. In the ultra-low-voltage domain, some of the secondary effects of the MOSFET are not relevant and thus not included in the 4-parameter model. A simplified MOSFET model for the ULV domain is of great importance to applications such as energy harvesting, sensor nodes for the Internet of Things, and always-on circuits.
C. M. Adornes Video Presentation NorCAS 2021
Acknowledgment: The authors would like to thank the Brazilian agencies CAPES, finance code 001, and CNPq for supporting this work.
[1] A. I. A. Cunha, M. C. Schneider and C. Galup-Montoro, "An MOS Transistor Model for Analog Circuit Design", IEEE J. Solid-State Circuits, vol. 33, no. 10, pp. 1510-1519, October 1998
[2] C. Galup-Montoro and M. C. Schneider, "The compact all-region MOSFET model: theory and applications", IEEE 16th International New Circuits and Systems Conference (NEWCAS), pp. 166-169, June 2018
[3] M. C. Schneider and C. Galup-Montoro, CMOS Analog Design Using All-Region MOSFET Modeling, Cambridge University Press, 2010
[4] C. Galup-Montoro and M. C. Schneider, MOSFET modeling for circuit analysis and design, World Scientific, 2007
[5] Verilog-A Reference Manual, Agilent Technologies, 2004
[6] 0. F. Siebel, "Um modelo eficiente do transistor MOS para o projeto de circuitos VLSI," Universidade Federal de Santa Catarina, Florianopolis, 2007
[7] F. N. Fritsch, R. E. Shafer and W. P. Crowley, "Algorithm 443: Solution of the transcendental equation wew=x," Commun. ACM, vol. 16, no. 2, pp. 123-124, 1973
[8] O. F. Siebel, M. C. Schneider and C. Galup-Montoro, "MOSFET threshold voltage definition, extraction and some applications," Microelectronics Journal, vol. 43, no. 5, pp. 329-336, May 2012
[9] G. Hiblot. DIBL-Compensated Extraction of the Channel Length Modulation Coefficient in MOSFETS. IEEE Transactions on Electron Devices, vol. 65, no. 9, pp. 4015-4018, 2018
[10] BSIM4v4.5.0 Technical Manual, Department of Electrical Engineering and Computer Science, UC Berkeley, Berkeley, CA, USA. 2004
[11] Y. Tsividis and C. McAndrew, Operation and Modeling of the MOS Transistor, Oxford Univ. Press, 2011
[12] J. V. T. Ferreira, C. Galup-Montoro, "Ultra-low-voltage CMOS ring oscillators. Electronics Letters," IET, v. 55, n. 9, p. 523-525,2019
[13] E. M. Camacho-Galeano, C. Galup-Montoro and M. C. Schneider, "A 2-nW 1.1.-V self biased current reference in CMOS technology," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 52, no. 2, pp. 61-65, 2005
[14] E. Bolzan, E. B. Storck, M. C. Schneider and C. Galup-Montoro, "Design and testing of a CMOS SelfBiased Current Source," 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 382-385, 2019
Nov 24, 2021
ESSCIRC/ESSDERC 2021 The Best Paper Awards
The #ESSCIRC #ESSDERC TPC is proud to announce The Best Paper Awards from ESSCIRC/ESSDERC 2021 in Grenoble, selected by our Technical Program Committee members:
- BEST JOINT PAPER 2021: “Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200MHz for 0.54MPix Depth Camera” by Cedric Tubert et al., STM (F)
- BEST STUDENT JOINT PAPER 2021: “Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology”, by @Asma Chabane, IBM Research GmbH
- BEST ESSDERC PAPER 2021: “Complementary Two-Dimensional (2-D) MoS_2 FET Technology”, by @Cristine Jin Estrada et al., The Hong Kong UST
- BEST ESSDERC STUDENT PAPER 2021:“VERILOR: a Verilog-a Model of Lorentzian Spectra for Simulating Trap-Related Noise in CMOS Circuits”, by @Angeliki Tataridou, IMEP-LaHC, Université Grenoble Alpes, University Savoie Mont Blanc, CNRS, Grenoble INP
- BEST ESSCIRC PAPER 2021: “A Resolution-Adaptive 8mm2 9.98Gb/S 39.7pJ/B 32-Antenna All-Digital Spatial Equalizer for mmWave Massive MU-MIMO in 65nm CMOS”, by @Oscar Castaneda et al., ETH Zürich and Cornell Univ.
- BEST ESSCIRC STUDENT PAPER 2021:”A −109.1 dB/−98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio Band”, by @Huajun Zhang et al., TU Delft
Sylvain CLERC Francois Andrieu Louis Hutin
on the behalf off#ESSCIRC #ESSDERC TPC
Subscribe to:
Posts (Atom)