Aug 10, 2021

[paper] Systematic approach for IG-FinFET amplifier design using gm/Id method

Alireza Hassanzadeh and Sajad Hadidi
Systematic approach for IG-FinFET amplifier design using gm/Id method
Analog Integrated Circuits and Signal Processing (2021)
https://doi.org/10.1007/s10470-021-01917-9

EE Department, Shahid Beheshti University, Tehran, Iran

Abstract: In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using gm/Id method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based gm/Id method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from a single 1 V power supply.

Figgm/Id vs. normalized Id(Vbg)



[paper] Compact Model for Electrostatics of III–V GAA Transistors

Mohit D. Ganeriwala, Francisco G. Ruiz*, Enrique G. Marin* and Nihar R. Mohapatra
A unified compact model for electrostatics of III–V GAA transistors with different geometries
Journal of Computational Electronics (2021)
Published: 07 August 2021
DOI: 10.1007/s10825-021-01751-2
 
Department of Electrical Engineering, Indian Institute of Technology Gandhinagar, Gandhinagar, Gujarat, 382355, India
*Department of Electronics, University of Granada, Granada, Spain


Abstract: In this work, a physics-based unified compact model for III-V GAA FET electrostatics is proposed. The model considers arbitrary cross-sectional geometry of GAA FETs viz. rectangular, circular and elliptical. A comprehensive model for cuboid GAA FETs is developed first using the constant charge density approximation. The model is then combined with the earlier developed model for cylindrical GAA FETs to have a unified representation. The efficacy of the model is validated by comparing it with simulation data from a 2D coupled Poisson-Schrödinger solver. The proposed model is found to be accurate for GAA FETs with different geometries, dimensions and channel materials and computationally efficient.
Fig: III–V GAA transistors with different geometries

Acknowledgements: This work is supported by the Visvesvaraya PhD scheme by MeitY, Gover nment of India Enrique G. Marin gratefully acknowledges Juan de la Cierva Incorporation IJCI-2017-32297 (MINECO/AEI).

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