Special Issue #papers: Planar Fully-Depleted SOI technology https://t.co/kuUWaIigqx

Special Issue #papers: Planar Fully-Depleted SOI technology https://t.co/kuUWaIigqx

— Wladek Grabinski (@wladek60) April 14, 2016

from Twitter https://twitter.com/wladek60

April 14, 2016 at 10:29AM
via IFTTT

25th Anniversary of the World Wide Web conference - Journal of Web Semantics - Elsevier https://t.co/qAZK9S2qXJ #papers

25th Anniversary of the World Wide Web conference - Journal of Web Semantics - Elsevier https://t.co/qAZK9S2qXJ #papers

— Wladek Grabinski (@wladek60) April 13, 2016

from Twitter https://twitter.com/wladek60

April 13, 2016 at 12:45PM
via IFTTT

[mos-ak] [2nd Announcement and Call for Papers] Summer MOS-AK Workshop Shanghai June 26-28, 2016

 Summer MOS-AK Workshop  

 Shanghai June 26-28, 2016 
  2nd Announcement and Call for Papers  

Together with the MOS-AK Honorary Committee represented by Profs. Tzu-Yin Chiu, SMIC and Ming-Kai Tsai, MediaTek SRC/CMC Chair, MOS-AK Workshop Scientific Program Coordinators: George Ponchak, Lingling Sun, Yuhua Cheng, Larry Nagel and Andrei Vladimirescu, local workshop organizer Min Zhang, SIMTAC (Shanghai) as well as all the Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held at SIMTAC in Shanghai between June 26-28, 2016. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:

Call for Papers - March. 2016
2nd Announcement - April 2016
Final Workshop Program - May 2016
International MOS-AK Workshop:

June 26 - MOS-AK Training Course

June 27 - 1st Day Workshop

June 28 - 2nd Day Workshop

Venue:

SIMIT/SIMTAC

Shanghai (CN)

Topics to be covered include the following among other related to the compact/SPICE modeling :

• Advances in semiconductor technologies and processing
• Compact Modeling (CM) of the electron devices
• Verilog-A language for CM standardization
• New CM techniques and extraction software
• Open Source TCAD/EDA modeling and simulation
• CM of passive, active, sensors and actuators
• Emerging Devices, CMOS and SOI-based memory cells
• Microwave, RF device modeling, high voltage device modeling
• Nanoscale CMOS devices and circuits
• Technology R&D, DFY, DFT and reliability/ageing IC Designs
• Foundry/Fabless Interface Strategies
  

Speakers: tentative list of MOS-AK Experts:

• Franz Sischka, SisConsult, (D)
  
• Mostafa Emam, Incize (B)
  
• Paulius Sakalas, CEDIC, TUD, (D)
  
• Thomas Gneiting AdMOS (D)
  
• Wladek Grabinski, MOS-AK (EU)
  
• Bertrand Ardouin, XMOD (F)
  
• Zhiping Yu, Stanford University (USA)
  
• Lining Zhang, HKUST (HK)
  

Online MOS-AK Abstract Submission:
Authors should submit an abstract using on-line MOS-AK submission:

http://www.mos-ak.org/shanghai_2016/

(any related inquiries can be sent to abstracts@mos-ak.org)

Online Workshop Registration:

http://www.mos-ak.org/shanghai_2016/
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

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MNE&MS 2016: Seminar Announcement

MNE&MS 2016

Seminar Announcement

The 8th traditional seminar “Computer simulation and design of micro-and nanoelectronics and micro-electromechanical systems” (MNE&MS 2016), organized by the Nanotechnology Center “OrelNano” and Physics Department will take place at the Orel State University after Ivan Turgenev, 29 Naugorskoe Shosse (in 212 Auditorium), Orel, Russia, on April 29th 2016 from 10am to 5pm.

The main objective of the MNE&MS 2016 is to allow regional electronics industry companies and Universities present results in research and development in micro-and nanoelectronics, power electronics, and microelectromechanical systems (MEMS) to potential customers, interested professionals, and students. Hence, the scope of seminar covers the most of Key Enabling Technologies (KETs), that is the basis for innovations in a range of products across all industrial sectors.

The Seminar also aims to introduce to Companies and Universities the latest developments in the electronics development automation (EDA), in particular in technology computer aided design (TCAD) and in compact modeling. Seminar includes session with oral presentations, poster session and an Exhibition of products of participating companies.

Selected papers will be recommended for publication in journals “Fundamental and Applied Problems of Technics and Technology” and “Information Systems and Technologies”. In addition, selected papers will be recommended for publication in proceedings of “Nanosystems, nanomaterials and nanotechnologies” of the XIV International Scientific Practical Internet – Conference “Energy and Resource Saving – XXI Century”. Information about previous regional seminars is available online.

Will be coffee breaks during seminar. In campus there is students diner and hotel (Naugorskoe Shosse 29 A). On April 30, Saturday, Organizing Committee can organize trip to the Spasskoye-Lutovinovo - State Memorial and Natural Reserve Museum of famous Russian writer Ivan Turgenev.

Our University located in South-West of Central Russia in historical town Orel (or Oryol), that was founded in 1566. Orel placed on Oka and Orlik rivers junction in 382 km from Moscow and has beautiful surroundings with number of historical landmarks.

Contact phones: +79208250040
Hotel reception phone is +7(4862)419882 or +79038816347
Official language of seminar – Russian.
There is no registration fee.

[Incize] Senior Semiconductor R&D Engineer

Incize is recruiting a senior semiconductor R&D engineer for a three-year research project. The project aims to develop an innovative semiconductor characterization technique that is of great interest for the semiconductor industry.

What Incize offers:

• Permanent contract
• Infinite opportunities to learn
• Friendly and flexible environment
• Competitive salary

What Incize requires:

• PhD in physics, electronics or material science
• Knowledge of semiconductor physics, microwave theory, optics and their applications
• Experience  in  designing  and  running  experiments  in  microwave  and  optics domains
• Experience in TCAD and ADS simulations
• Clean-room experience is an advantage
• Passion for research and innovation
• 2-3 years of experience in R&D after PhD

Your Responsibilities

• Development of a new characterization method and its theoretical background
• Planning and execution of experiments
• Numerical TCAD and ADS simulations
• Literature search

How to apply

Please send your CV, a list of publications and a cover letter to info@incize.com with the subject line job_RD01_2016_lastname. References should be provided upon request.

About Incize

Incize provides characterization and modelling services for semiconductor foundries and fabless companies. It is a spin-off from Université catholique de Louvain and is based in Louvain-la-Neuve, Belgium. Visit www.incize.com to find out more.

www.incize.com

Chemin du Cyclotron, 6

B-1348 Louvain-la-Neuve, Belgium

T: +32 10 39 22 60

F: +32 10 39 20 01