Students from Microelectronics Students’ Group win Cadence® Contest

CADENCE® EMEA (Europe, Middle East and Africa regions) organized the first full custom design contest, entitled Virtuoso Olympics. In this unique and innovative event the best layout designers from the top academic institutions in Europe will compete for the title of Fastest full custom layout designer of the year.

Two students from the Microelectronics Students’ Group of the University of Porto (FEUP) won this Cadence® contest. Daniel Oliveira and Américo Dias accepted the challenge and accomplished the target, wining the first place.

An interesting discussion in LinkedIn

There is an interesting thread in LinkedIn, started by Antonio Irvin Aquino:

Is there a market for outsourced device modelling/simulation??

By the moment, I've seen no comments, but I should think that, at least, there is a market for outsourced device models courses...

Papers in Solid-State Electronics, May 2009

Three interesting new papers in the May 2009 issue of Solid-State Electronics:

A new analytical threshold voltage model for the doped polysilicon thin-film transistors
Weijing Wu, Ruohe Yao, Xueren Zheng

Compact model of short-channel MOSFETs considering quantum mechanical effects
G.S. Jayadeva, Amitava DasGupta

Modeling of kink effect in polycrystalline silicon thin-film transistors
Wanling Deng, Xueren Zheng

IEDM'09

The 2009 IEEE International Electron Devices Meeting (IEDM) will be held in the Hilton Baltimore Hotel in Baltimore (MD) from December 6 to 9 2009. This time IEDM will not be held in Washington after the San Francisco edition!

IEDM is the top conference in the field of electron devices. It is of course the most competitive one. Only truly outstanding papers are accepted. It is highly recommended that experimental results are shown, also some good simulation papers can be also accepted.

Two short courses will be held on Sunday, December 6, on on low power/low energy circuits and scaling challenges.

This year there will also be three plenary presentations. Furthermore, there will be a An Emerging Technology session on "Graphene Nanoelectronics".

Deadline for abstract submissions is June 26 2009 at 5.00 pm Pacific Standard Time.

Topics include all aspects related to electron devices, grouped in several areas:

-CMOS DEVICES & TECHNOLOGY (CDT)
-CHARACTERIZATION, RELIABILITY and YIELD (CRY)
-DISPLAYS, SENSORS, AND MEMS (DSM)
-MEMORY TECHNOLOGY (MT)
-MODELING AND SIMULATION (MS)
-PROCESS TECHNOLOGY (PT)
-QUANTUM, POWER, AND COMPOUND SEMICONDUCTOR DEVICES (QPC)
-SOLID STATE AND NANOELECTRONIC DEVICES (SSN)

This year the area of Modeling and Simulation (MS) explicitly includes "physical and compact models for devices and interconnects", and also "parameter extraction", and "early compact models for advanced technologies." It seems that compact modeling is considered a more important topic in IEDM than ever before!

If you have important results to show, I vively recommend to send an abstract to IEDM. It is the best place to present them, and to discuss them with the top people. Even if your abstract is rejected, or if you do not have any new results to show, I encourage researchers to attend IEDM, including compact modeling researchers.

BMAS'09

The 2009 IEEE International Behavioral Modeling and Simulation Conference (BMAS 2008) will be held in San Jose, CA, on September 17-18, in conjunction with the 2009 Custom Integrated Circuits Conference (CICC), in the Doubletree Hotel in San Jose, at the heart of Silicon Valley.

BMAS addresses behavioral modeling and simulation for analog electronic circuits and systems. One of the main areas of topics is "Semiconductor Device Compact Modeling", which includes: " Compact device modeling lanuages and compilers", "Standard and new compact device models implemented in Verilog-A and VHDL-AMS", and "Compact device models for emerging technologies and topical issues (nano-devices, distributed thermal effect, leakaging issues, manufacturability, radiation effects, etc)".

The deadline for paper submission is May 18 2009.

For compact and behavioral modeling researchers, BMAS is no doubt a very interesting conference to attend, and for circuit designers, it is a very good complement to CCIC.

Posted by Benjamin Iniguez at 08:04