Showing posts with label Technologies. Show all posts
Showing posts with label Technologies. Show all posts

Jun 7, 2023

[Commemorative] History of Junction Technologies

Hiroshi Iwai
History of Junction Technologies
Commemorative talk for the 75th anniversary of the transistor
IWJT 2023; T-Cosponsored by IEEE EDS; 
Kyoto (J) June 8-9, 2023

1 International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
2 Tokyo Institute of Technology, Japan

Abstract: In this paper, I describe the history of junction technologies for ICT (Information and Communication Technology) devices. Junctions serve as functional interfaces between materials in these devices. Over the past 200 years, since the inception of electrical engineering, a wide range of junction technologies have been developed as key components for device operation, playing a significant role in advancing intelligence in human society.

FIG: The first idea of FET (MISFET) by J. Lilienfeld "Method and apparatus for controlling electric current", Canadian Patent CA272437TA, filed October 22, 1925

Acknowledgements: I [author: Hiroshi Iwai] would like to express my sincere appreciation to the Tokyo Institute of Technology Library for granting me access to historically significant documents. The information available on the Computer History Museum (CHM) website was instrumental in understanding the timeline of device development. I am deeply grateful to Prof. Kazuo Tsutsui of Tokyo Institute of Technology for providing me with a conducive environment to concentrate on writing this manuscript. I would also like to extend my gratitude to the IWJT committee members for granting me the valuable opportunity to document the history of junction technologies, logic and memory device technologies, as well as reviewing the lengthy manuscript. In particular, I am grateful to Dr. Michael Current for his meticulous review of the manuscript. Finally, I would like to thank my colleagues in both industry and academia who have dedicated their time and expertise to the advancement of integrated circuit technology over the years.

Nov 15, 2021

[book] Future Ultra Low Power Electronics

Semiconductor Devices and Technologies for Future Ultra Low Power Electronics (1st ed.)
Nirmal, D., Ajayan, J., & Fay, P.J. (Eds.)
CRC Press. (2021).
DOI: 10.1201/9781003200987

Abstract: This book covers the fundamentals and significance of 2-D materials and related semiconductor transistor technologies for the next-generation ultra low power applications. It provides comprehensive coverage on advanced low power transistors such as NCFETs, FinFETs, TFETs, and flexible transistors for future ultra low power applications owing to their better subthreshold swing and scalability. In addition, the text examines the use of field-effect transistors for biosensing applications and covers design considerations and compact modeling of advanced low power transistors such as NCFETs, FinFETs, and TFETs. TCAD simulation examples are also provided. 

Contents:
Preface vii
Editors ix
Contributors xi
Chapter 1: An Introduction to Nanoscale CMOS Technology Transistors: A Future Perspective; pp: 1
Kumar Prasannajit Pradhan
Chapter 2: High-Performance Tunnel Field-Effect Transistors (TFETs) for Future Low Power Applications; pp: 29
Ribu Mathew, Ankur Beohar, and Abhishek Kumar Upadhyay
Chapter 3: Ultra Low Power III-V Tunnel Field-Effect Transistors; pp: 59
J. Ajayan and D. Nirmal
Chapter 4: Performance Analysis of Carbon Nanotube and Graphene Tunnel Field-Effect Transistors; pp: 87
K. Ramkumar, Singh Rohitkumar Shailendra, and V. N. Ramakrishnan
Chapter 5: Characterization of Silicon FinFETs under Nanoscale Dimensions; pp: 115
Rock-Hyun Baek and Jun-Sik Yoon
Chapter 6: Germanium or SiGe FinFETs for Enhanced Performance in Low Power Applications; pp: 129
Nilesh Kumar Jaiswal and V. N. Ramakrishnan
Chapter 7: Switching Performance Analysis of III-V FinFETs .; pp: 155
Arighna Basak, Arpan Deyasi, Kalyan Biswas, and Angsuman Sarkar
Chapter 8: Negative Capacitance Field-Effect Transistors to Address the Fundamental Limitations in Technology Scaling; pp: 187
Harsupreet Kaur
Chapter 9: Recent Trends in Compact Modeling of Negative Capacitance Field-Effect Transistors; pp: 203
Shubham Tayal, Shiromani Balmukund Rahi, Jay Prakash Srivastava, and Sandip Bhattacharya
Chapter 10 Fundamentals of 2-D Materials; pp: 227
Ganesan Anushya, Rasu Ramachandran, Raj Sarika, and Michael Benjamin
Chapter 11 Two-Dimensional Transition Metal Dichalcogenide (TMD) Materials in Field-Effect Transistor (FET) Devices for Low Power Applications; pp 253
R. Sridevi and J. Charles Pravin
Index pp: 289