Thursday, 27 June 2013

[mos-ak] "Advances in Condensed Matter Physics" Special Issue on Device Modeling

Advances in Condensed Matter Physics is published using an open access publication model, meaning that all interested readers are able  to freely access the journal online without the need for a subscription. Moreover, the journal currently has an Impact Factor of 1.158.

 

This special issue focuses on novel advances in the broad field of device modeling. Models of semiconductor devices are used in circuit simulators in order to predict the functionality of circuits and are an important prerequisite for successful circuit design. The currently available semiconductor models are facing enormous challenges in modeling the observed physical phenomena in the sub-50nm technologies. The demand for advanced models, which can describe emerging devices necessary in the near future and can account for their physical effects, has led to enormous R&D efforts in the development of advanced physics-based models. These novel devices that can reduce the cost of the actual ones (by using organic materials) and/or improve their performances (low leakage, low power, and high speed in a smaller footprint) will be preferred in circuits, thus calling for accurate and reliable models, including new device specific effects. Modeling these devices is of high importance in order to analyze and predict the behaviour of emerging ones, without the high cost necessary to fabricate the real components. For some specific purposes, like power and timing analysis, it is really necessary to incorporate models at gate level, too. These models also suffer the effects of nanoscaling and are currently under intense development.


Potential topics include, but are not limited to:
  • Modeling the physical behaviour of novel silicon-based FETs (FinFETs, DG FETs, nanowires, junctionless FETs, tunneling FETs, variable barrier transistors, etc.)
  • Modeling the physical behaviour of graphene-based devices
  • Modeling the physical behaviour of organic semiconductor-based devices (OLEDs, junctions, TFTs, sensors, etc.)
  • Device and gate level model implementation for circuit simulations

Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/acmp/guidelines/.

Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/submit/journals/acmp/rdsd/ according to the following timetable:

 

Manuscript Due  Friday, 13 December 2013

First Round of Reviews  Friday, 7 March 2014

Publication Date  Friday, 2 May 2014

 

Lead Guest Editor

Oana Moldovan, Universitat Rovira i Virgili, Tarragona, Spain

Guest Editors 

AlejandraCastro-Carranza, Universitat Rovira i Virgili, 43007 Tarragona, Spain

Fran├žois Lime, Universitat Rovira i Virgili, 43007 Tarragona, Spain

Rodrigo Picos, Universitat de les Illes Balears. Cra. deValldemossa, km 7.5, Palma, Illes Balears, Spain

Bogdan Mihai Nae, Universitat Rovira i Virgili, 43007 Tarragona, Spain

Spiros Nikolaidis, Aristotle Universityof Thessaloniki, Thessaloniki, Greece

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Sunday, 23 June 2013

CMC @ Si2

The CMC as a member of the Si2 will continue its basic goal of examining, promoting and standardizing SPICE modeling efforts based upon business needs. CMC (see its Member List)  encourages developers to dwell on current and near-term problems that will advance compact modeling. They will continue to provide industry resources and funding for monitoring/mentoring compact model development.

[read more: CMC Presentation at DAC]

Friday, 21 June 2013

[mos-ak] 11th MOS-AK/GSA ESSDERC ESSCIRC Workshop with the keynote speaker Larry Nagel

Together with Prof. Andrei Vladimirescu, R&D Scientific Coordinator, the Organizing Committee and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the 11th MOS-AK/GSA ESSDERC ESSCIRC Workshop on Sept. 20, 2013 in Bucharest (RO). The event will open next decade of enabling compact modeling R&D exchange.  

Speakers - previsionary list (in alphabetic order)
  • Larry Nagel
    • MOS-AK Keynote Speaker
  • Prof. Matthias Bucher, TUC Chania
  • Dr. Ales Chvala, STU Bratislava
  • Prof. Benjamin Iniguez, URV Tarragona
  • Prof. Hans Juergen Mattausch, Uni Hiroshima
  • Dr. Paolo Nenzi, Uni Roma, NGSpice
  • Dr. Jean-Michel Sallese, EPFL Lausanne
  • Prof. Valentin Turin, OSTU Orel
  • Prof. Andrei Vladimirescu, ISE Paris and UC Berkeley
In the terms of participation, intending participants and authors should also note the following dates: 
  • Call for Papers - May 2013
  • 2nd Announcement - June 2013
  • Final Workshop Program - July, 2013
  • MOS-AK/GSA Workshop - Sept. 20, 2013

Further details and updates: <http://www.mos-ak.org/bucharest/
Email contact: <workshops@mos-ak.org

- with regards - WG (for the MOS-AK/GSA Committee

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Friday, 14 June 2013

Jobs for modelling specialists

This time, in Paris:

Senior Modelling Engineer

Location:
Paris, France
Sector:
Contract:
Permanent
Salary:
€50,000 – €70,000
 
Look here for more information.

Tuesday, 11 June 2013

EU Goal: Reach 20% World-Share in Chip Manufacturing by 2020

EU to spend € 10 billion to trigger € 100 billion investments — SEMI provides the platforms for our members to share critical implementation issues and actions to support the goals set by the EU [H. Kundert, president, SEMI Europe] 

The new European industrial strategy for micro- and nano-electronics, published on 23 May 2013, sets the framework for targeted investment across the electronics value and innovation chain. An Industrial Strategy Roadmap for Investment, to be developed by end 2013, will cover three complementary lines:
  • Transition to 450mm, expected to primarily benefit equipment and material manufacturers in Europe
  • “More than Moore” on 200mm and 300 mm
  • “More Moore” for ultimate miniaturization on 300mm wafers
Investment will be concentrated, focusing on Europe’s clusters of excellence in manufacturing and design (Grenoble, Dresden and Eindhoven-Leuven), but will also support partnerships and alliances across the value chain in Europe.

[read more...] also don't miss the SEMICON Europa 2013 Call for Papers (open until June 27). The conferences are a great opportunity to present your technology and latest achievements to a large audience of industry professionals. For more information about SEMICON Europe programs, the Call for Papers and opportunities to exhibit and present your products please go online and visit semiconeuropa.org.

Thursday, 6 June 2013

Jobs for compact modelling specialists

Some jobs I've found while surfing the internet: (remember, we're not offering these jobs, only commenting on them!!).

(look at http://www.semiconductorjobs.com/a/jobs/find-jobs/q-compact+model+device for more information).


May 30 Modeling Engineering Manager TriQuint Semiconductor US Richardson, TX
device characterization measurement, device model parameter extraction, and model ... product design. Produce and maintain 'compact' models for GaAs and GaN RFIC... more
 
May 05 Spice Modeling Engineer Globalfoundries California
experienced Spice modeling engineer in the Compact Modeling & Characterization (CMC) ... Working closely with lab engineers on the device characterization (DC/AC/Transient/RF),... more
 
Mar 26 Compact Device Modeling Engineer Intel Hillsboro, OR
Title: Compact Device Modeling Engineer Location: USA-Oregon, Hillsboro Job Number: 705850 ... * Developing and maintaining compact device models in internal circuit... more

May 30 Senior Software Architect Xilinx San Jose, CA
Candidate will work in Device Modeling group in FPGA Implementation tools division of ... and coming up with new algorithms and compact data structures to represent Xilinx... more
 
May 23 Tcad device engineer Job Micron Boise, ID
In this position, you will be studying detailed process and device design/optimization usi ... - Experience/knowledge in CMOS process, deep submicron device physics, state of the art mo... more

May 17 Staff Engineer
Santa Clara, CA
special needs in device modeling (e.g. device measurement, reliability stress, and ... Knowledge in numerical device/process simulation and chip level extraction is a plus. more
 
May 15 Compact Device Modeling Engineer Job Intel Hillsboro, OR
involves developing state-of-the-art compact device models and working in a highly ... - Developing and maintaining compact device models in internal circuit... more






Saturday, 1 June 2013

[mos-ak] Si2 Announces Acquisition of the Compact Model Council

Standard SPICE Models, API, and Language Foundational to Industry

AUSTIN, Texas — (BUSINESS WIRE) — May 31, 2013 — The Silicon Integration Initiative (Si2) has announced the acquisition of the Compact Model Council (CMC). The CMC, formed in 1996, develops and standardizes compact models of electronic devices used within commercial circuit simulators across the electronics industry, including virtually all SPICE-class simulation. The CMC will be renamed the Compact Model Coalition to blend with Si2's organizational structure. The CMC, represented by 37 member companies, supports 20 active subcommittees and has produced over a dozen widely-used standard device models, modeling API, and SPICE language standard.

Details of the transfer and future plans will be presented at the Design Automation Conference (DAC) to be held in Austin, TX from June 2-6. The first presentation will be at the Si2 25th Anniversary Luncheon Celebration on June 3, 12-1:30 PM in Room 9ABC in the Austin Convention Center. The luncheon is free of charge. Other presentations are scheduled in the Si2 Booth #1427 on the DAC exhibit floor at: June 4 - 10:30AM and 4:30PM, and June 5 - 1:30PM. More information on this and other Si2 events can be found at this link: http://www.si2.org/?page=1544

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