New Y-function based MOSFET parameter extraction method from weak to strong inversion range https://t.co/qIhncY55c7 #papers #feedly

New Y-function based MOSFET parameter extraction method from weak to strong inversion range https://t.co/qIhncY55c7 #papers #feedly

— Wladek Grabinski (@wladek60) June 18, 2016

from Twitter https://twitter.com/wladek60

June 18, 2016 at 09:13PM
via IFTTT

Organic Semiconductors Books to Download https://t.co/7ccToLje3o #papers

Organic Semiconductors Books to Download https://t.co/7ccToLje3o #papers

— Wladek Grabinski (@wladek60) June 17, 2016

from Twitter https://twitter.com/wladek60

June 17, 2016 at 09:37AM
via IFTTT

Near-Threshold Computing https://t.co/KUUFizDja3 #papers

Near-Threshold Computing https://t.co/KUUFizDja3 #papers

— Wladek Grabinski (@wladek60) June 16, 2016

from Twitter https://twitter.com/wladek60

June 16, 2016 at 02:37PM
via IFTTT

A practical guide to SOI by Incize https://t.co/9JPT9AbwT1 #papers

A practical guide to SOI by Incize https://t.co/9JPT9AbwT1 #papers

— Wladek Grabinski (@wladek60) June 16, 2016

from Twitter https://twitter.com/wladek60

June 16, 2016 at 08:43AM
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[mos-ak] [Final Program] International MOS-AK Workshop Shanghai June 26-28 2016

 International MOS-AK Workshop

 Shanghai, June 26-28, 2016

 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   

865 Changning Road, Building No. 5, on the 3rd Floor, 

Conference Hall,

Changning District, Shanghai (CN)

Online Workshop Registration:

<http://www.simtac.org/?p=156&lang=zh>

(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:

<http://www.mos-ak.org/shanghai_2016/>

• June 26 - MOS-AK Training Course
• June 27 - 1st Day Workshop
• June 28 - 2nd Day Workshop

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016

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[mos-ak] [Final Program] International MOS-AK Workshop in Shanghai on June 26-28, 2016

 International MOS-AK Workshop

 Shanghai, June 26-28, 2016

 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   

865 Changning Road, Building No. 5, on the 3rd Floor, 

Conference Hall,

Changning District, Shanghai (CN)

Online Workshop Registration:

<http://www.simtac.org/?p=156&lang=zh>

(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:

<http://www.mos-ak.org/shanghai_2016/>

• June 26 - MOS-AK Training Course
• June 27 - 1st Day Workshop
• June 28 - 2nd Day Workshop

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016

--
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To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
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For more options, visit https://groups.google.com/d/optout.

[book] Compact Models for Integrated Circuit Design

 Compact Models for Integrated Circuit Design: 

 Conventional Transistors and Beyond

 Samar K. Saha

Taylor & Francis, 26 Aug 2015 - Technology & Engineering - 545 pages - ISBN 9781482240665

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond provides a modern treatise on compact models for circuit computer-aided design (CAD). Written by an author with more than 25 years of industry experience in semiconductor processes, devices, and circuit CAD, and more than 10 years of academic experience in teaching compact modeling courses, this first-of-its-kind book on compact SPICE models for very-large-scale-integrated (VLSI) chip design offers a balanced presentation of compact modeling crucial for addressing current modeling challenges and understanding new models for emerging devices.

Starting from basic semiconductor physics and covering state-of-the-art device regimes from conventional micron to nanometer, this text:

• Presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models
• Discusses the major issue of process variability, which severely impacts device and circuit performance in advanced technologies and requires statistical compact models
• Promotes further research of the evolution and development of compact models for VLSI circuit design and analysis
• Supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices
• Includes exercise problems at the end of each chapter and extensive references at the end of the book

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond is intended for senior undergraduate and graduate courses in electrical and electronics engineering as well as for researchers and practitioners working in the area of electron devices. However, even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts from this book. [more...]