Jan 28, 2016

Special Issue: Planar Fully-Depleted SOI technology https://t.co/gM2tHCE84M #papers


from Twitter https://twitter.com/wladek60

January 28, 2016 at 07:49AM
via IFTTT
Posted by at No comments:
Labels: ,

Jan 27, 2016

How quality control could save your science https://t.co/FGxeOfhjZB #papers #feedly


from Twitter https://twitter.com/wladek60

January 27, 2016 at 04:59PM
via IFTTT
Posted by at No comments:
Labels: ,

Linux and #opensource are the future https://t.co/UoiRSK3rqE #opensource #feedly


from Twitter https://twitter.com/wladek60

January 27, 2016 at 03:33PM
via IFTTT
Posted by at No comments:
Labels: , ,

Building a FOSS Force Community https://t.co/ZPzX3Kh4NK #opensource


from Twitter https://twitter.com/wladek60

January 27, 2016 at 12:03AM
via IFTTT
Posted by at No comments:
Labels: , ,

Jan 26, 2016

Nanowire Transistors Could Let You Talk, Text, and Tweet Longer https://t.co/B0KDYiABR7 #papers


from Twitter https://twitter.com/wladek60

January 26, 2016 at 11:33PM
via IFTTT
Posted by at No comments:
Labels: ,

[mos-ak] [2nd Announcement and Call for Papers] Spring MOS-AK Workshop Dresden March 18, 2016

Spring MOS-AK Workshop 
 Dresden March 18, 2016
 2nd Announcement and Call for Papers 

Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, local workshop organizers Martin Claus and Sandra Bley as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held in Dresden in the DATE Conference timeframe. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:
Call for Papers - Dec. 2015
2nd Announcement - Jan. 2016
Final Workshop Program - Feb. 2016

MOS-AK Workshop: March 18, 2016
09:00 - 10:30 - Morning MOS-AK Session
11:00 - 12:00 - CM Standardization Panel
12:00 - 13:00 - Lunch
13:00 - 16:00 - Afternoon MOS-AK Session 

Venue:
Center for Advancing Electronics Dresden (CFAED)
Technische Universität Dresden
Würzburger Str. 46
01187 Dresden
Germany

Topics to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC Designs
  • Foundry/Fabless Interface Strategies
Online MOS-AK Abstract Submission:
Authors should submit an abstract using on-line MOS-AK submission form:
http://www.mos-ak.org/dresden_2016/abstracts.php
(any related inquiries can be sent to abstracts@mos-ak.org)

Free Online Workshop Registration:
http://www.mos-ak.org/dresden_2016/registration.php
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

(WG 26012016)

--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
Visit this group at https://groups.google.com/group/mos-ak.
For more options, visit https://groups.google.com/d/optout.
Posted by at No comments:

ArduinoPhone 2.0 - An #opensource mobile phone https://t.co/17knLM0cC1 #todo #feedly


from Twitter https://twitter.com/wladek60

January 26, 2016 at 10:56AM
via IFTTT
Posted by at No comments:
Labels: , ,

Visit Brussels and learn about open source at #FOSDEM 2016 https://t.co/HzplsOxRbm #opensource #feedly


from Twitter https://twitter.com/wladek60

January 26, 2016 at 10:45AM
via IFTTT
Posted by at No comments:
Labels: , ,

Unified Compact #Model Covering Drift-Diffusion to Ballistic Carrier Transport https://t.co/sr4HBeYi4g #papers #feedly


from Twitter https://twitter.com/wladek60

January 26, 2016 at 08:09AM
via IFTTT
Posted by at No comments:
Labels: , ,

Jan 25, 2016

ISSCC Focuses on Image Processors for Autonomous Cars #modeling https://t.co/U587enncd1


from Twitter https://twitter.com/wladek60

January 25, 2016 at 08:43PM
via IFTTT
Posted by at No comments:
Labels: , ,

Jan 22, 2016

Compact #Model Parameter Extraction Using Bayesian Inference, Incomplete New Measurements, and Optima... https://t.co/5C3aRdoBqA


from Twitter https://twitter.com/wladek60

January 22, 2016 at 11:18PM
via IFTTT
Posted by at No comments:
Labels: , ,

Leakage current minimisation and power reduction techniques using sub-threshold design #modeling https://t.co/71Ah4ALDEB


from Twitter https://twitter.com/wladek60

January 22, 2016 at 05:17PM
via IFTTT
Posted by at No comments:
Labels: , ,

Analytical #Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors https://t.co/ox0DFIspyF


from Twitter https://twitter.com/wladek60

January 22, 2016 at 02:59PM
via IFTTT
Posted by at No comments:
Labels: , ,

Compact #Modeling of Magnetic Tunneling Junctions https://t.co/sl9NaOEg4G


from Twitter https://twitter.com/wladek60

January 22, 2016 at 02:52PM
via IFTTT
Posted by at No comments:
Labels: , ,

Parasitic Capacitance Analytical #Modeling for Sub-7-nm Multigate Devices https://t.co/z8Q8IcuINM


from Twitter https://twitter.com/wladek60

January 22, 2016 at 02:47PM
via IFTTT
Posted by at No comments:
Labels: , ,

Parasitic Capacitance Analytical Model for Sub-7-nm Multigate Devices #modeling https://t.co/9Q50HGFkni


from Twitter https://twitter.com/wladek60

January 22, 2016 at 02:44PM
via IFTTT
Posted by at No comments:
Labels: , ,

Jan 19, 2016

FOSDEM 2016 EDA Devroom

FOSDEM 2016: EDA Devroom
Room: AW1.121 
Saturday, 30 January 2016

Software developers have a much easier time sharing their developments than hardware designers. When you put a piece of code on the Web, you don't ask yourself if others will have the freedom and resources to access a text editor to look at it and modify it, or a compiler or interpreter to have the code do something useful. The landscape for hardware designs is more complicated. The dominant design and simulation tools are proprietary, and there is not even a de-facto proprietary standard format to share designs. The Electronic Design Automation (EDA) Devroom looks at recent progress in Free CAD/EDA Tools for hardware design and simulation, and serves as a meeting place for discussion about future collaborations and FOSS developments. Come and see how some of these tools are actually catching up, and sometimes even more, in terms of features and quality.

[EDA Devroom Detailed Agenda]

Posted by at No comments:
Labels: , , , ,
Location: Brussels, Belgium

Jan 18, 2016

NEEDS Berkeley Workshop 2016

Modelling using Verilog-A in MAPP: A Hands-On Workshop

8 AM - 6 PM
Thursday, Feb 4, 2016

University of California, Berkeley
Berkeley, CA 94720
Berkeley's Model and Algorithm Prototyping Platform (MAPP) is a MATLAB-based platform that provides a complete environment for developing, testing, experimentally validating, and inserting compact models in open source simulation platforms. It is also useful for prototyping new simulation algorithms.
This hands-on workshop will focus on the newly developed Verilog-A to ModSpec device model translator for MAPP, dubbed VAPP (Verilog-A Parser and Processor). The goal of the workshop is to illustrate how VAPP/MAPP facilitates the development of simulation ready compact models. An overview of MAPP's multi-physics modelling and simulation capabilities will also be provided. A hands-on refresher on MAPP will be provided for those who have no prior experience with it.
Please bring your laptop (running linux, OSX or Windows). It would be very helpful if you already have MATLAB installed and running on your laptop; otherwise you may need to access the hands-on components through the web.

For more information about MAPP, see: https://nanohub.org/groups/needs/mapp
Travel support will be available for NEEDS students. Please try to share a room, and ask your advisor to e-mail Mark Lundstrom at lundstro@purdue.edu for travel support.

For other questions, please contact Vicki Johnson at vicki@purdue.edu

Posted by at No comments:
Labels: , ,
Location: Berkeley, CA, USA
Subscribe to: Posts (Atom)