Mar 22, 2011
Complete IC simulation requires a full toolbox of hardware and software
Complete IC simulation requires a full toolbox of hardware and software: "Discovering a design error after you send youraverage chip to manufacturing c..."
Mar 16, 2011
[mos-ak] Final Program MOS-AK/GSA Workshop in Paris
Please visit the MOS-AK/GSA Paris web site with the final workshop
program:
http://www.mos-ak.org/paris/
program:
http://www.mos-ak.org/paris/
* Free On-line Registration Form:
http://www.mos-ak.org/paris/registration.php
* Venue:
Université Pierre et Marie Curie
LIP6 (UPMC)
4 Place Jussieu; Paris
Bâtiment ESCLANGON; Amphithéâtre ASTIER
* Agenda: 7-8 April 2011 MOS-AK/GSA Workshop
"Frontiers of the Compact Modeling for Advanced Analog/RF
Applications"
April 7 (13:00-16:00)
* half day/afternoon MOS-AK modeling session
* poster session introduction
* COMON Network meeting/session (members only)
* informal MOS-AK/COMON "modeling" dinner (individual selfpaid)
April 8 (9:00-16:00)
* morning MOS-AK Session
* poster session
* afternoon MOS-AK Session
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Mar 14, 2011
I've found this offer, which I'm sharing with you:
Looking for Modeling & Characterization Engineer. Please send resume to Goldie.Homan@onsemi.com or apply Job 10536 at http://www.onsemi.com/PowerSolutions/content.do?id=16367
Position Description As a Modeling Engineer in the Corporate R&D department, you will:
- Perform and analyze electrical measurements on various devices.
- Design test structures.
- Extract device SPICE models using ICCAP, UTMOST, MQA, and other in-house software packages.
- Support transfer methodology for models from TRD to Design Methodology.
- Document characterization and modeling work according to established procedures.
- Evaluate and support implementation of new characterization, modeling and methods.
- Provide performance assessment and feedbacks for device development engineering.
- Interface with Design Methodology, Design, Foundry and external customers to resolve characterization/modeling issues and improve characterization/modeling methods.
- Work jointly with modeling groups in CZ to perform characterization/modeling tasks.
- Perform other tasks as may be from time to time assigned.
Position Requirements Successful candidates for this position will have:
- A BS/MS/PhD in Electrical Engineering/Physics/Material Science/Chemical Engineering/Chemistry. MS/PhD preferred.
- In-depth understanding of semiconductor device physics and proficiency in DC, AC, and RF characterization.
- Previous Design/Device fabrication/Process integration experience desired.
- Ability to utilize statistical techniques is required.
- UNIX/LINIX shell, PERL programming experience is desired.
- Previous experience with BiPolar device design/simulation/modeling is a plus.
- Previous experience in RF parasitic extraction is a plus
- Demonstrated ability to work successfully with external groups is required.
- Perform and analyze electrical measurements on various devices.
- Design test structures.
- Extract device SPICE models using ICCAP, UTMOST, MQA, and other in-house software packages.
- Support transfer methodology for models from TRD to Design Methodology.
- Document characterization and modeling work according to established procedures.
- Evaluate and support implementation of new characterization, modeling and methods.
- Provide performance assessment and feedbacks for device development engineering.
- Interface with Design Methodology, Design, Foundry and external customers to resolve characterization/modeling issues and improve characterization/modeling methods.
- Work jointly with modeling groups in CZ to perform characterization/modeling tasks.
- Perform other tasks as may be from time to time assigned.
Position Requirements Successful candidates for this position will have:
- A BS/MS/PhD in Electrical Engineering/Physics/Material Science/Chemical Engineering/Chemistry. MS/PhD preferred.
- In-depth understanding of semiconductor device physics and proficiency in DC, AC, and RF characterization.
- Previous Design/Device fabrication/Process integration experience desired.
- Ability to utilize statistical techniques is required.
- UNIX/LINIX shell, PERL programming experience is desired.
- Previous experience with BiPolar device design/simulation/modeling is a plus.
- Previous experience in RF parasitic extraction is a plus
- Demonstrated ability to work successfully with external groups is required.
Mar 13, 2011
NASA To Host Open Source Summit
NASA will host a summit about open source software development on March 29-30 at the agency's Ames Research Center in Moffett Field, Calif. The event runs from 9 a.m. to 5 p.m. PDT on both days.
NASA's first Open Source Summit will bring together engineers, policy makers and members of the open source community. Participants will discuss the challenges within the existing open source policy framework and propose modifications to facilitate NASA's development, release and use of software. [more]
Mar 2, 2011
SPICE: a 40-year old open-source success story
From EDN:
SPICE: a 40-year old open-source success storySPICE, the Simulation Program with Integrated Circuits Emphasis, has turned 40 years old. The IEEE has marked the occasion by designating the development of SPICE as a Milestone in Electrical Engineering and Computing. On February 23rd, the Computer History Museum hosted a celebration with a roundtable discussion by the individuals most responsible for bringing SPICE from its origin as a UC Berkeley student project to the huge commercial success it has achieved as the most widely used tool in the semiconductor industry.
The panel (from left to right) consisted of:
- Ron Rohrer - 2002 Kaufman Award recipient, who taught the class at UCB that developed the progenitor of SPICE, CANCER (Computer Analysis of Nonlinear Circuits, Excluding Radiation)
- Larry Nagel - as a student in Ron’s class, Larry took on CANCER as his Master’s degree project, and eventually developed the 1st successful implementation - SPICE2 - as his doctoral thesis.
- Kim Hailey - co-founder (with Shawn Hailey) of Meta-Software, where HSPICE was created.
- Ken Kundert - who led the development of Cadence’s Spectre simulator.
- David Hodges - Distinguished Professor Emeritus at UCB, the panel moderator, who is well known for leading the development of analog IC design in CMOS and for the original (Level-1) Shichman-Hodges MOS device model.
Read more.... in EDN
Feb 28, 2011
Analog/Mixed-Signal Behavioral Modeling
From Cadence... (see the original)
By Richard Goering on February 20, 2011
So when to use what? The conservative style provided by Verilog-A and Verilog-AMS is useful when there are significant accuracy requirements. This approach can potentially provide a 50-100X speedup over SPICE, but it all depends on how good your modeling is. "If you're a poor modeler, there's a chance you could end up with a model that's as slow as SPICE simulation or even slower," Walter warned.
Real number modeling, also available through Verilog-AMS with the wreal data type, brings real number values into event-driven digital simulation. It thus has the speed benefits of digital simulation and can leverage the metric-driven verification methodology that's increasingly used by digital engineers. It's good when there are hard performance requirements and limited accuracy requirements. For example, wreal is very useful for full-chip mixed-signal simulations.
The following chart shows the accuracy/speed tradeoff ranges provided by various analog/mixed-signal modeling alternatives. Note that the conservative modeling style has a broad possible range, depending on how good the modeling is.
Analog/Mixed-Signal Behavioral Modeling – When to Use What
So when to use what? The conservative style provided by Verilog-A and Verilog-AMS is useful when there are significant accuracy requirements. This approach can potentially provide a 50-100X speedup over SPICE, but it all depends on how good your modeling is. "If you're a poor modeler, there's a chance you could end up with a model that's as slow as SPICE simulation or even slower," Walter warned.
Real number modeling, also available through Verilog-AMS with the wreal data type, brings real number values into event-driven digital simulation. It thus has the speed benefits of digital simulation and can leverage the metric-driven verification methodology that's increasingly used by digital engineers. It's good when there are hard performance requirements and limited accuracy requirements. For example, wreal is very useful for full-chip mixed-signal simulations.
The following chart shows the accuracy/speed tradeoff ranges provided by various analog/mixed-signal modeling alternatives. Note that the conservative modeling style has a broad possible range, depending on how good the modeling is.
Feb 25, 2011
Microelectronics Journal, in-press, february 2011
Modeling of threshold voltage of a quadruple gate transistor
Md. Gaffar, Sayed Ashraf Mamuna, and Md. Abdul Matina
Available online 24 February 2011.
Abstract
In this paper, a three dimensional analytical solution of electrostatic potential is presented for undoped (or lightly doped) quadruple gate MOSFET by solving 3-D Poisson's equation. It is shown that the threshold voltage predicted by the analytical solution is in close agreement with TCAD 3-D numerical simulation results. Numerical simulation, self-consistent Schrodinger–Poisson equations, calibrated by 2D non equilibrium green function simulation, are used.
Md. Gaffar, Sayed Ashraf Mamuna, and Md. Abdul Matina
Available online 24 February 2011.
Abstract
In this paper, a three dimensional analytical solution of electrostatic potential is presented for undoped (or lightly doped) quadruple gate MOSFET by solving 3-D Poisson's equation. It is shown that the threshold voltage predicted by the analytical solution is in close agreement with TCAD 3-D numerical simulation results. Numerical simulation, self-consistent Schrodinger–Poisson equations, calibrated by 2D non equilibrium green function simulation, are used.
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