There is an interesting thread in LinkedIn, started by Antonio Irvin Aquino:
Is there a market for outsourced device modelling/simulation??
By the moment, I've seen no comments, but I should think that, at least, there is a market for outsourced device models courses...
May 22, 2009
May 21, 2009
Papers in Solid-State Electronics, May 2009
Three interesting new papers in the May 2009 issue of Solid-State Electronics:A new analytical threshold voltage model for the doped polysilicon thin-film transistors
Weijing Wu, Ruohe Yao, Xueren Zheng
Compact model of short-channel MOSFETs considering quantum mechanical effects
G.S. Jayadeva, Amitava DasGupta
Modeling of kink effect in polycrystalline silicon thin-film transistors
Wanling Deng, Xueren Zheng
May 18, 2009
IEDM'09
The 2009 IEEE International Electron Devices Meeting (IEDM) will be held in the Hilton Baltimore Hotel in Baltimore (MD) from December 6 to 9 2009. This time IEDM will not be held in Washington after the San Francisco edition!
IEDM is the top conference in the field of electron devices. It is of course the most competitive one. Only truly outstanding papers are accepted. It is highly recommended that experimental results are shown, also some good simulation papers can be also accepted.
Two short courses will be held on Sunday, December 6, on on low power/low energy circuits and scaling challenges.
This year there will also be three plenary presentations. Furthermore, there will be a An Emerging Technology session on "Graphene Nanoelectronics".
Deadline for abstract submissions is June 26 2009 at 5.00 pm Pacific Standard Time.
Topics include all aspects related to electron devices, grouped in several areas:
-CMOS DEVICES & TECHNOLOGY (CDT)
-CHARACTERIZATION, RELIABILITY and YIELD (CRY)
-DISPLAYS, SENSORS, AND MEMS (DSM)
-MEMORY TECHNOLOGY (MT)
-MODELING AND SIMULATION (MS)
-PROCESS TECHNOLOGY (PT)
-QUANTUM, POWER, AND COMPOUND SEMICONDUCTOR DEVICES (QPC)
-SOLID STATE AND NANOELECTRONIC DEVICES (SSN)
This year the area of Modeling and Simulation (MS) explicitly includes "physical and compact models for devices and interconnects", and also "parameter extraction", and "early compact models for advanced technologies." It seems that compact modeling is considered a more important topic in IEDM than ever before!
If you have important results to show, I vively recommend to send an abstract to IEDM. It is the best place to present them, and to discuss them with the top people. Even if your abstract is rejected, or if you do not have any new results to show, I encourage researchers to attend IEDM, including compact modeling researchers.
BMAS'09
The 2009 IEEE International Behavioral Modeling and Simulation Conference (BMAS 2008) will be held in San Jose, CA, on September 17-18, in conjunction with the 2009 Custom Integrated Circuits Conference (CICC), in the Doubletree Hotel in San Jose, at the heart of Silicon Valley.
BMAS addresses behavioral modeling and simulation for analog electronic circuits and systems. One of the main areas of topics is "Semiconductor Device Compact Modeling", which includes: " Compact device modeling lanuages and compilers", "Standard and new compact device models implemented in Verilog-A and VHDL-AMS", and "Compact device models for emerging technologies and topical issues (nano-devices, distributed thermal effect, leakaging issues, manufacturability, radiation effects, etc)".
The deadline for paper submission is May 18 2009.
For compact and behavioral modeling researchers, BMAS is no doubt a very interesting conference to attend, and for circuit designers, it is a very good complement to CCIC.
Open Ph D Student position in semiconductor device modeling
We offer one scholarship for a Ph D student position in the Department of Electronic Engineering in the Universitat Rovira i Virgili (URV), in
The duration of the grant will be for four years. The monthly salary will be about 1000 Euro/month. The position will start in January 2009.
The candidate should have a Bachelor or Master degree in Electrical Engineering, Electronic Engineering, Telecommunication Engineering or Physics. A good background in Semiconductor Physics, Semiconductor Devices, or Integrated Circuit Design will be highly appreciated.
The work to be done by the candidate will be focused on the development of new techniques of characterization and modeling of novel advanced semiconductor devices, in particular III-V devices. It will be related to one European projects in which the hosting group participates.
Required documents for applicants
Applicants are required to send to the address specified below the following documents (in English or Spanish):
1) a full Curriculum Vitae (as complete as possible)
2) Copy of their diploma
3) copy of their passport
4) Academic certificate including their marks (it is important that the number of hours or credits of each subject appears). It is also very important that the document specifies what is the minimum mark for passing a given subject and what is the maximum mark that can be awarded.
Candidates can send their documents by e-mail, but in fact we will need original and copy documents (or authenticated copy) of them; therefore we also suggest to send the documents by postal mail.
Applications should be sent to:
Prof. Benjamin Iñiguez
Department of Electronic, Electrical and Automatic Control Engineering
Universitat Rovira i Virgili (URV)
Avinguda Països Catalans, 26
43007
Email: benjamin.iniguez@gmail.com
Tel: +34977558521 Fax:+34977559610
Deadline:
You can contact Prof. Benjamin Iñiguez (Benjamin.Iniguez@gmail.com) for more information
May 12, 2009
Nano-Net 2009: International ICST Conference on Nano-Networks
Fourth International ICST Conference on Nano-Networks
18-20 October, 2009, Lucerne, Switzerland
The Nano-Net 2009 conference positions itself at the intersection of two worlds, namely, emerging nanotechnologies on one side, and Information & Communication Technologies on the other side. One of the standing questions that this conference addresses is: What are the new communication paradigms that derive from the transition from micro- to nano-scale devices? The convergence of nano-technologies with established and novel engineering disciplines such as communication and network theory, sensors and actuators, and biomedical engineering is expected to radically shift our notions about efficient system and network design. Nano- Net provides a unique multidisciplinary forum for the discussion of novel techniques in modeling, design, simulation, and fabrication of nano-scale systems.
The Nano-Net 2009 conference invites original technical papers that have not been published and are not currently under review for publication elsewhere. Contributions addressing subjects pertaining to nanotechnology and networking are solicited. Suggested topics include, but are not limited to the following:
18-20 October, 2009, Lucerne, Switzerland
The Nano-Net 2009 conference positions itself at the intersection of two worlds, namely, emerging nanotechnologies on one side, and Information & Communication Technologies on the other side. One of the standing questions that this conference addresses is: What are the new communication paradigms that derive from the transition from micro- to nano-scale devices? The convergence of nano-technologies with established and novel engineering disciplines such as communication and network theory, sensors and actuators, and biomedical engineering is expected to radically shift our notions about efficient system and network design. Nano- Net provides a unique multidisciplinary forum for the discussion of novel techniques in modeling, design, simulation, and fabrication of nano-scale systems.
The Nano-Net 2009 conference invites original technical papers that have not been published and are not currently under review for publication elsewhere. Contributions addressing subjects pertaining to nanotechnology and networking are solicited. Suggested topics include, but are not limited to the following:
- Emerging nano-devices and fabrication technologies
- Modeling and simulation of nano-devices and systems
- Nano-materials, nano-photonics
- Nano-electronics and architectures
- Reliability and fault-tolerance
- Nano-networks
- Nano-bio paradigms and applications
- Nanosensor Self-Organization
- Nano-mechatronics
- Emerging topics in nano-technologies
Important dates
- Workshop/Tutorial Proposals:May 31, 2009
- Paper Submissions: May 15, 2009
- Acceptance Notification:June 15, 2009
- Camera-Ready Version: July 15, 2009
- Nano-Net 2009 Conference: October 18-20, 2009
May 9, 2009
2009 IEEE International SOI Conference Deadline Extended
SUBMISSION DEADLINE EXTENDED!
The 2009 IEEE International SOI Conference Committee has extended the deadline
for submission of papers to be considered for presentation at the conference to
be held in Silicon Valley, California this October until 29-MAY.
This year's SOI conference will be highlighted by exciting invited talks. Some
of the topics to be covered are Synopsis, Rambus and Freescale on SOI design, on
technology from IBM and IMEC discussing the extendibility of SOI
technology beyond node 22nm to 16nm and 11; Peregrine will discuss RF
applications while Corning will present Silicon on Glass; and Soitec and Leti
will discuss the enabling possibilities of molecular bonding towards 3D
integration and nanotechnology. With the momentum that SOI based technologies is
gaining, the SOI conference is the ideal forum to exchange and network. The SOI
conference is an enriching forum where not only digital and power IC electronics
is discussed but also expands discussion to wafer engineering and circuit
transfer techniques opening up a spectrum of new applications like 3D,
photonics, nano-technologies and devices architectures beyond CMOS.
Submissions should be sent to soipaper@bacminc.com. Further information about
the conference, including an abstract template, can be found on the conference
web site at www.soiconference.org, or you may call the conference manager at
310/305-7885.
The 2009 IEEE International SOI Conference Committee has extended the deadline
for submission of papers to be considered for presentation at the conference to
be held in Silicon Valley, California this October until 29-MAY.
This year's SOI conference will be highlighted by exciting invited talks. Some
of the topics to be covered are Synopsis, Rambus and Freescale on SOI design, on
technology from IBM and IMEC discussing the extendibility of SOI
technology beyond node 22nm to 16nm and 11; Peregrine will discuss RF
applications while Corning will present Silicon on Glass; and Soitec and Leti
will discuss the enabling possibilities of molecular bonding towards 3D
integration and nanotechnology. With the momentum that SOI based technologies is
gaining, the SOI conference is the ideal forum to exchange and network. The SOI
conference is an enriching forum where not only digital and power IC electronics
is discussed but also expands discussion to wafer engineering and circuit
transfer techniques opening up a spectrum of new applications like 3D,
photonics, nano-technologies and devices architectures beyond CMOS.
Submissions should be sent to soipaper@bacminc.com. Further information about
the conference, including an abstract template, can be found on the conference
web site at www.soiconference.org, or you may call the conference manager at
310/305-7885.
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