CEA-Leti, SOI Industry Consortium and Soitec want to make you aware that the presentations are now posted on the SOI Industry Consortium website:
http://www.soiconsortium.org/corners/fully-depleted-soi/february-2012/index.php
Mar 7, 2012
SISPAD'2012 - Second call for papers
Call for Papers
The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of the leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures. |
Date and Location
- Conference date: September 5-7, 2012
- Abstract submission deadline: April 1, 2012
- Conference location: Sheraton Denver Downtown Hotel, Denver, Colorado, USA
- Webpage: http://www.ece.umd.edu/sispad2012
Topics Original papers are solicited in the following subject areas:
|
The abstract should describe the nature of the presentation, together with references. The text must be single-spaced with 11pt or 12pt font. The abstract is limited to two pages including figures, tables and references. Abstracts should be submitted in PDF format.
For more information, please visit:
http://www.ece.umd.edu/sispad2012/
Mar 5, 2012
NDES 2012 July 11 – 13, 2012, Wolfenbüttel, Germany
The conference aims at stimulating and enabling scientists from all over the world to exchange know-ledge and ideas in the field of nonlinear dynamics and its applications in a friendly atmosphere. Nonlinear phenomena are observed in diverse areas such as physics, biology, economics, electronics and computer science. The conference will cover cutting-edge research in these highly active fields and explore new perspectives of nonlinear dynamics in interdisciplinary applications. The scope of interest includes, but it is not limited to:
- Theory, analysis, modelling, implementations and applications of nonlinear circuits and systems in science, technology and biology
- Nonlinear network analysis
- Neural networks, neurodynamics, robots
- Nonlinear signal processing: Time-series analysis, communication, coding
- Nonlinear devices: Sensors, lasers
- Bifurcation and chaos, control and synchronisation
- Geodynamics
Ruedi Stoop (Conference Co-Chair, Organizing Committee)
Feb 29, 2012
Papers in March 2012
SP-HV: A Scalable Surface-Potential-Based Compact Model for LDMOS Transistors
Yao, W. Gildenblat, G. McAndrew, C. C. Cassagnes, A.Abstract | Full Text: PDF (435KB)
Applicability of Macroscopic Transport Models to Decananometer MOSFETs
Vasicek, M. Cervenka, J. Esseni, D. Palestri, P. Grasser, T.Physics-Based Modeling of GaN HEMTs
Vitanov, S. Palankovski, V. Maroldt, S. Quay, R. Murad, S. Rodle, T. Selberherr, S.A Compact Analytic Model of the Strain Field Induced by Through Silicon Vias
Jan, S.-R. Chou, T.-P. Yeh, C.-Y. Liu, C. W. Goldstein, R. V. Gorodtsov, V. A. Shushpannikov, P. S.Abstract | Full Text: PDF (849KB)
A Subthreshold Swing Model for Thin-Film Fully Depleted SOI Four-Gate Transistors
Sayed, S. Hossain, M. I. Khan, M. Z. R.Abstract | Full Text: PDF (138KB)
Statistical Variability in Fully Depleted SOI MOSFETs Due to Random Dopant Fluctuations in the Source and Drain Extensions
Markov, S. Cheng, B. Asenov, A.Abstract | Full Text: PDF (403KB)
The Compact Modeling of Channel Potential in Sub-30-nm NAND Flash Cell String
Kang, M. Lee, K. Chae, D. H. Park, B.-G. Shin, H.Abstract | Full Text: PDF (384KB)
Measurement of Source Resistance in Top-Contact Organic Thin-Film Transistors
Singh, V. K. Agrawal, A. K. Mazhari, B.Abstract | Full Text: PDF (249KB)
Demystifying Surrogate Modeling for Circuits and Systems
Yelten, M.B. Zhu, T. Koziel, S. Franzon, P.D. Steer, M.B.Abstract | Full Text: PDF (1492KB)
Teaching Memory Circuit Elements via Experiment-Based Learning
Pershin, Y.V. Ventra, M.D.Abstract | Full Text: PDF (1655KB)
Feb 28, 2012
Agilent Technologies Completes Acquisition of Accelicon Technologies' Solutions for Semiconductor Device Modeling
SANTA CLARA, Calif., Feb. 21, 2012
Agilent Technologies Inc. (NYSE: A) today announced that Accelicon Technologies' software solutions and technology for device-level modeling and validation in the electronics industry are now part of Agilent. The two companies had announced an acquisition agreement on Dec. 1, 2011. Financial details were not disclosed.
The acquisition, led by Agilent's EEsof EDA organization, further enhances Agilent's leadership in semiconductor device modeling. Accurate, verified device models are critical to reduce R&D design cycles as higher frequencies, smaller technology nodes, new materials and device layouts call for more accurate process design kits. As part of the Software and Modular Solutions Division, Agilent EEsof continues to integrate its industry-leading design simulation with real measurements to improve design efficiency for engineers who develop communications systems. These improved tools and processes solve the increasing complexities they face when designing communications systems for aerospace/defense and commercial wireless applications.
Agilent's newly acquired solutions from Accelicon include MBP for device-level extraction and model generation, MQA for device-level model validation and AMA for advanced model analysis, including layout effects.
Accelicon was founded in 2002 by noted industry veteran Dr. Xisheng Zhang, who has now joined Agilent along with former Accelicon CEO Tim K. Smith. The majority of the former Accelicon employees are located in Beijing; they are also now part of Agilent.
Agilent Technologies Inc. (NYSE: A) today announced that Accelicon Technologies' software solutions and technology for device-level modeling and validation in the electronics industry are now part of Agilent. The two companies had announced an acquisition agreement on Dec. 1, 2011. Financial details were not disclosed.
The acquisition, led by Agilent's EEsof EDA organization, further enhances Agilent's leadership in semiconductor device modeling. Accurate, verified device models are critical to reduce R&D design cycles as higher frequencies, smaller technology nodes, new materials and device layouts call for more accurate process design kits. As part of the Software and Modular Solutions Division, Agilent EEsof continues to integrate its industry-leading design simulation with real measurements to improve design efficiency for engineers who develop communications systems. These improved tools and processes solve the increasing complexities they face when designing communications systems for aerospace/defense and commercial wireless applications.
Agilent's newly acquired solutions from Accelicon include MBP for device-level extraction and model generation, MQA for device-level model validation and AMA for advanced model analysis, including layout effects.
Accelicon was founded in 2002 by noted industry veteran Dr. Xisheng Zhang, who has now joined Agilent along with former Accelicon CEO Tim K. Smith. The majority of the former Accelicon employees are located in Beijing; they are also now part of Agilent.
Feb 23, 2012
8th International Conference on Organic Electronics
Tarragona, Spain June 25‐27, 2012
Organic electronics is a rapidly growing technology that is anticipated to compare with conventional microelectronics in the near future to make transistor circuits, displays and solar cells. Other application like sensors are expected. The International Conference on Organic Electronics was held from 2005 to 2008 in Eindhoven, The Netherlands. In 2009, ICOE moved to Liverpool, United Kingdom, in 2010 to Paris, in 2011 in Rome, while the 2012 edition will be held at the campus of University Rovira i Virgili (URV) in Tarragona, Spain. The conference intends to cover all aspects of organic electronics, including materials and chemistry, transistors, OLEDs, photovoltaic cells, circuits and circuit design, manufacturing and inclusion in systems.
Technical areas include, but are not limited to:
- Materials and chemistry
- Transistors
- OLEDs Photovoltaic cells
- Circuits and circuit design
- Manufacturing and inclusion in systems
- Modelling
The conference will be held in coordination with two other events, partially related to the topic: the 10th Graduate Student Meeting on Electronic Engineering (June 21-22) and the 2nd International Training Course on Compact Modelling (TCCM 2012) (June 28-29).
Feb 20, 2012
[mos-ak] Final Program MOS-AK/GSA India Workshop on March 16-18, 2012
Final Program MOS-AK/GSA India Workshop on March 16-18, 2012
============================================================
http://www.mos-ak.org/india/
============================================================
http://www.mos-ak.org/india/
* Venue:
========
Jaypee Institute of Information Technology (JIIT),
A-10, Sector-62, Noida (U.P.), India
Phone: 0120-2400973-976, 2400987
http://www.mos-ak.org/india/#Venue
* Workshop Registration Form
============================
http://inae.org/contents/Registration%20Form.pdf
* Agenda:
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http://www.mos-ak.org/india/
with CMOS technology and SPICE Models Tutorial by Dr. N.D. Arora,
Silterra, Malaysia
Organizing MOS-AK/GSA Committee:
================================
A.B. Bhattacharyya, Emeritus Professor, JIIT, India (Chair)
S.C. Saxena, Vice Chancellor, JIIT, Noida (Host)
Ehrenfried Seebacher, austriamicrosystems AG, Austria (Co-Chair)
Wladek Grabinski, MOS-AK (European Arrangements Co-Chair)
M.J. Zarabi, Chairman, Vice-President, Microelectronics Forum INAE New
Delhi, India
Varambally Rajamohan, ST Microelectronics, India
Shantanu Mahapatra, IISc, India
Rajamohan Varambally, ST Microelectronics, Noida, India
Kulbhushan Misri, Freescale, Noida, India
M. Jagdesh Kumar, IIT Delhi, India
Manoj Saxena, Delhi University, South Campus, New Delhi, India
Extended MOS-AK/GSA Committee:
==============================
http://www.mos-ak.org/committee.html
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