Sedemos News

Apr 29, 2010

POWER/HVMOS Devices Compact Modeling

W. Grabinski and T. Gneiting, (Eds.)
1st Edition., 2010, V, 300 p., Hardcover
ISBN: 978-90-481-3045-0

Content Level » Research

Keywords » HV EKV, HV HiSIM,MM20, compact modeling - LDMOS, VDMOS, quasi-saturation, self heating - power, high voltage semiconductor devices

TABLE OF CONTENTS
CHAPTER 1: Numerical Power/HV Device Simulations; Oliver Triebl and Tibor Grasser.

CHAPTER 2: HiSIM-HV: A scalable, surface-potential-based compact model for symmetric and asymmetric high-voltage MOSFETs; Hans J. Mattausch, Norio Sadachika, M. Yokomichi, M. Miyake, T. Kajiwara, H. Kikuchihara, U. Feldmann, and M. Miura-Mattausch.

CHAPTER 3: MM20 HVMOS Model: a surface-potential based LDMOS model for circuit simulation; Annemarie Aarts and Alireza Tajic.

CHAPTER 4: Practical HV DMOS modeling using HVEKV; Yogesh Singh Chauhan, Francois Krummenacher and Adrian Mihai Ionescu.

CHAPTER 5: Power Devices; Andrzej Napieralski, Malgorzata Napieralska and Lukasz Starzak.

CHAPTER 6: Distributed modeling approach applied to the IGBT; Patrick Austin and Jean-Louis Sanchez.

CHAPTER 7: Web Based Modeling Tools; Andrzej Napieralski, Lukasz Starzak, Bartlomiej Swiercz and Mariusz Zubert.

Apr 27, 2010

[mos-ak] MOS-AK/GSA Rome Workshop Press Release

MOS-AK/GSA Modeling Working Group Holds Workshop in Rome
Academic and Industrial Experts Share Their Latest Perspectives on
Compact Modeling and Verilog-A Standardization
http://www.gsaglobal.org/news/article.asp?article=2010/0426

in other sources:

http://www.marketwatch.com/story/mos-akgsa-modeling-working-group-holds-workshop-in-rome-2010-04-26?reflink=MW_news_stmp
http://ca.news.finance.yahoo.com/s/26042010/34/biz-f-business-wire-mos-ak-gsa-modeling-working-group-holds-workshop.html
http://www.forbes.com/feeds/businesswire/2010/04/26/businesswire138742381.html
http://www.finanznachrichten.de/nachrichten-2010-04/16725421-mos-ak-gsa-modeling-working-group-holds-workshop-in-rome-004.htm
http://it.tmcnet.com/news/2010/04/26/4750513.htm

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New IEEE EDS Senior Members

My warmest welcome to the new IEEE Senior Members of the EDS in April:

Alberto Adan, Carlos Araujo, M Scott Burroughs, Gerd Hechtfischer, Aaron Ho, Syed Islam, Ioannis Kymissis, Sungjae Lee, Xian Liu, M Madheswaran, Enrique Miranda, Michael Parker, Vijay Reddy, Sean Rommel, Nikita Ryskin, Nayanathara Sattiraju, Keyhan Sinai, Bhaskar Srinivasan, Munehiro Tada, Tsuyoshi Tanaka, Thy Tran, Mingwei Xu, Tetsuo Yamada

Apr 23, 2010

[mos-ak] MOS-AK/GSA Rome workshop on-line publications

MOS-AK/GSA Rome workshop on-line publications are available:
http://www.mos-ak.org/rome/

I would like to thank all MOS-AK speakers and poster presenters for
sharing their compact modeling competence, R&D experience and
delivering valuable MOS-AK presentations. I am sure, that our modeling
event in Rome was beneficial to all MOS-AK Workshop attendees.

Organization of our modeling event would not be possible without our
generous sponsor: Agilent Technologies, Micron and Micron Foundation
as well as the IEEE EDS, technical co-sponsor. I also would like to
personally acknowledge local organizers, in particular, Professors
Fernanda Irrera and Marco Balucani for their dedication, commitment.
My very special 'thank you' goes to Angela Gatto and Paolo Nenzi not
only for providing smooth workshop logistics.

I hope, we would have a next chance to meet all of you and your
academic and industrial partners at future MOS-AK/GSA modeling events
(listed below).

-- with regards - WG (for the MOS-AK/GSA)
==========================================================
* London: May 18-19, www.gsaglobal.org
* Tarragona: Jun.30-Jul.1 www.compactmodelling.eu/an_details.php?anID=14
* Wroclaw: June 24-26 www.mixdes.org/Special_sessions.htm
* Seville: Sept. 17 www.mos-ak.org/seville http://www.essderc2010.org/
* San Francisco: Dec'10 www.mos-ak.org
==========================================================

Apr 20, 2010

3rd International Workshop on Compact Thin-Film Transistor Modeling (C-TFT)

The 3rd International Workshop on Compact Thin-Film Transistor Modeling for Circuit Simulation (C-TFT) will be held in Tarragona on July 2 2010.

The C-TFT Workshop will provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by the Universitat Rovira i Virgili in collaboration with the IEEE EDS Compact Modeling Technical Committee and the University College London.

Topics:
A partial list of the areas of interest includes:

- Physics of TFTs and operating principles
- Compact TFT device models for circuit simulation
- Model implementation and circuit analysis techniques
- Model parameter extraction techniques
- Applications of compact TFT models in emerging products
- Compact models for interconnects in active matrix flat panels
Other details:
Prospective authors are invited to submit an abstract of up to 500-word to: nae.bogden@urv.cat

Important dates:

- Deadline for abstract submission: May 7, 2010
- Notification of acceptance: May 21, 2010
- Camera-ready version: Jun 18, 2010

This event will be held in coordination with the Training Courses on Compact Modeling (June 30-July 1) and the Graduate Student Meeting on Electronic Engineering (June 28-29).

Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tarraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.