One Student, One Chip
2025 Summer Launch Conference
π Conference Details
- Date & Time: July 21st (Monday), 14:30
- Location: Room 104, Mingde Campus, Shenzhen University, Nanshan District, Shenzhen, Guangdong Province
- Participation: Online registration open until July 19th, 23:59
- Live Stream: Bilibili Live Broadcast Link
π About the Project
The "One Student One Chip" (δΈηδΈθ―, ysyx.org) program is an open-source, free, and public training platform aimed at developing full-stack engineers proficient in both hardware and software. It's designed for lifelong learners of all ages—from primary school to university—without limitations. Students are guided in designing and implementing a RISC-V CPU, using:
- Chisel (hardware description language)
- FPGA tools
- DK development environment
They explore concepts spanning:
- Digital logic
- RTL design
- Computer architecture
- Operating systems
- Compilers
Since its 2019 launch, the program has involved over 12,000 students, with backing from top universities including Tsinghua, Peking, and Fudan.
π Key Highlights for 2025
- New teaching materials with a hierarchical learning model (EDCBA) to enhance learning efficiency
- Post-course chip design program with ECOS Studio tools and open-source test platforms
- Launch of MOLI Learning Platform, offering curated courses from universities like MIT, Tsinghua, and Peking University
π« Supporting Institutions
- Tsinghua University
- Peking University
- Fudan University
- Zhejiang University
- Shanghai Jiao Tong University
- University of Science and Technology of China
- Harbin Institute of Technology
- National University of Defense Technology
