Nov 19, 2019

#paper D. Mahajan, S. A. Albahrani, R. Sodhi, T. Eguchi and S. Khandelwal, "Physics-Oriented Device Model for Packaged GaN Devices," in IEEE TPE doi: 10.1109/TPEL.2019.2953060 https://t.co/fZEFBTrvHg https://t.co/aFN8iGGVDA


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November 19, 2019 at 10:20AM
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Nov 13, 2019

Czochralski IEEE Milestone Event (Nov.15 2019) Hochschule für Technik und Wirtschaft Berlin University of Applied Sciences - HTW Berlin https://t.co/MzxFrFUbTf #paper https://t.co/4HZPQe4WeA


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November 13, 2019 at 11:32AM
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Nov 11, 2019

#paper F. Ávila Herrera, et al., "Leading-Edge Thin-Layer MOSFET Potential Modeling Toward Short-Channel Effect Suppression and Device Optimization," in IEEE JEDS doi: 10.1109/JEDS.2019.2948648 doi: 10.1109/EDTM.2019.8731246 https://t.co/7E9755kTOW https://t.co/vh1Zy9BifJ


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November 11, 2019 at 08:32PM
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8th International NRNU MEPhI Workshop

VIII Международный научно-методический семинар по средствам автоматизированного проектирования интегральных микросхем для физического эксперимента совместно с компанией Cadence

it is our pleasure to announce the 8th International Workshop and school on computer aided design of integrated circuits for physical experiments to be held at NRNU MEPhI on November 25-27, 2019. The Workshop and school are organized by NRNU MEPhI jointly with Cadence Design Systems. The program and further information are available via site cad.mephi.ru.

Participation in the event is free of charge but registration is necessary.

E. Atkin, NRNU MEPhI event secretary,

Nov 7, 2019

#paper Tengteng Lu, Zhen Li, Chao Luo, Jun Xu, Weicheng Kong, and Guoping Guo Characterization and Modeling of 0.18µm CMOS Technology at sub-Kelvin Temperature IEEE TED 2018 https://t.co/4lkzLP9jvz https://t.co/4QUcjG94EY


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November 07, 2019 at 03:27PM
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#paper Alam, M.N.K., Roussel, P., Heyns, M. et al. Positive non-linear capacitance: the origin of the steep subthreshold-slope in ferroelectric FETs. Sci Rep 9, 14957 (2019) doi:10.1038/s41598-019-51237-2 https://t.co/zWwduLz8pB https://t.co/6pXnXiXjW8


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November 07, 2019 at 10:24AM
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Nov 6, 2019

Nov 5, 2019

Si2 Compact Model Coalition Releases #SPICE #Model for Advanced IC Designs Twenty #CMC Members Benefit from 18-Month Access to New Standard Model https://t.co/yQyblGXwuG https://t.co/nUX9XtQESq


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November 05, 2019 at 04:42PM
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#paper A. Rassekh, F. Jazaeri, M. Fathipour and J. Sallese, "Modeling Interface Charge Traps in Junctionless FETs, Including Temperature Effects," in IEEE TED, vol. 66, no. 11, pp. 4653-4659, Nov. 2019. doi: 10.1109/TED.2019.2944193 https://t.co/Ccg4wQtcG5 https://t.co/sBLZMVxcZo


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November 05, 2019 at 02:41PM
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Nov 4, 2019

Futurehorizons Silicon Chip Industry Workshop Monday Nov 11 2019 Holiday Inn - Kensington Forum, 97 Cromwell Road, London https://t.co/YSQduuwVGn #paper https://t.co/AKkgonXxby


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November 04, 2019 at 05:38PM
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#paper C. Prasad, "A Review of Self-Heating Effects in Advanced CMOS Technologies," in IEEE #TED, vol. 66, no. 11, pp. 4546-4555, Nov. 2019. doi: 10.1109/TED.2019.2943744 https://t.co/gAh4CAmDzu https://t.co/hyaCcsktDQ


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November 04, 2019 at 04:55PM
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IEDM Panel Dec 10 Rest in Peace Moore’s Law, Long Live AI Moderator: Vijay Narayanan, IBM Panelists: Vivek De Intel Wilfried Haensch IBM Mike Henry Mythic Ron Ho Facebook Seongjun Park Samsung Dimitri Strukov UCSB Douglas Yu TSMC https://t.co/G3Yy5XpIPK #paper https://t.co/ffijI0TpMP


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November 04, 2019 at 11:09AM
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BCICTS 2019: 2b. High Frequency Characterisation Tuesday 8:00 AM - Blackbird A/B Session Chair: Breandán Ó hAnnaidh, Analog Devices Co-Chair: Sadayuki Yoshitomi, Toshiba https://t.co/hghKdEx9ty #paper https://t.co/SbPScPM0ee


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November 04, 2019 at 08:28AM
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6 remarkable features of the new #UN #opensource #initiative https://t.co/UCk0xLbtL5 https://t.co/uNGBipmWrx


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November 04, 2019 at 09:29AM
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Nov 1, 2019

#paper: Versatile model for the contact region of organic thin-film transistors A.Romeroab J.Gonzáleza M.J.Deenc J.A.Jiménez-Tejadab https://t.co/9wJwjKlu69 https://t.co/rFCp02RFEF


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November 01, 2019 at 03:56PM
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#Indian #startups have raised a record $11.3B this year – TechCrunch https://t.co/qiJE1BnlV1 #paper https://t.co/yDn1H7aiPJ


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November 01, 2019 at 03:03PM
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Openings for Research Staff and PhD Scholarships Singapore-MIT Alliance for Research and Technology Low Energy Electronic Systems - Phase II 1 CREATE Way 09-01/02 CREATE Tower; 01-13 Enterprise Wing Singapore 138602 https://t.co/hUapbZCyAU #paper https://t.co/VNFXBjlxRY


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November 01, 2019 at 02:01PM
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Program to convert Sandia’s Albuquerque, N.M.-based fab from 150mm (6-inch) to 200mm (8-inch) wafer sizes. As part of the move, Sandia is converting its 0.35-micron (350nm) rad-hard process from 150mm to 200mm. The process is called CMOS7 https://t.co/JrWmF8BV0a #paper https://t.co/FJasxsp3s1


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November 01, 2019 at 01:55PM
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Oct 30, 2019

[mos-ak] [2nd Announcement and C4P] 12th International MOS-AK Workshop, Silicon Valley, DEC.11, 2019

Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
12th International MOS-AK Workshop
(co-located with the IEDM and CMC Meetings)
Silicon Valley, December 11, 2019

Together with Silvaco, lead sponsor and local organization team, International MOS-AK Board of R&D Advisers as well as all the Extended MOS-AK TPC Committee, we have the pleasure to invite to consecutive, 12th International MOS-AK Workshop which will be organized at Silvaco HQ on Dec. 11, 2019 (co-located with the IEDM and CMC Meetings)

Planned 12th International MOS-AK Workshop aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring academic and industrial experts in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Venue
Silvaco
2811 Mission College Blvd., 6th Floor
Santa Clara, California 95054

Online Workshop Registration is open 
(any related enquiries can be sent to registration@mos-ak.org)

Topics to be covered include the following among other related to the compact/SPICE modeling and its Verilog-A standardization:
  • Compact Modeling (CM) of the electron devices
  • Advances in semiconductor technologies and processing
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source (FOSS) TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, TFT, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS, BiCMOS, SiGe, GaN, InP devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC designs
  • Foundry/Fabless Interface Strategies
Important Dates: 
  • Call for Papers - Sept. 2019
  • 2nd Announcement - Oct. 2019
  • Final Workshop Program - Nov. 2019
  • MOS-AK Workshop: Dec. 11, 2019
Online Abstract Submission is open 
(any related enquiries can be sent to abstract@mos-ak.org)
WG301019

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2019 Heterogeneous Integration Roadmap (#HIR) Identifies Long-Term Technology Requirements to Inspire Collaboration in the Electronics Industry https://t.co/jaUzdB43xC #paper https://t.co/46jxVMGZ9O


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October 30, 2019 at 02:37PM
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Oct 28, 2019

6 signs you might be a Linux user - No.6 is: You have a passion for #opensource https://t.co/qccZsXhLBE


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October 28, 2019 at 07:17PM
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#China has set up a new national #semiconductor fund of 204.2 #billion yuan ($28.9 billion), as it seeks to nurture its domestic chip industry and close the technology gap with the U.S. https://t.co/TkPFpKl4FG #paper https://t.co/VwRp13XNJU


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October 28, 2019 at 01:47PM
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Oct 23, 2019

#Google scientists confirmed in a blog post that their #quantum #computer had needed just 200 seconds to solve a problem that they claim would take the world’s fastest supercomputer 10,000 years to complete. https://t.co/9OeWXZADKj #paper https://t.co/SjkB5JlZVv


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October 23, 2019 at 03:46PM
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Synthesis of an optimized control signal for an improved EMC switching behavior of MOSFETs using a system characterization approach; C Krause, A Bendicks, T Dörlemann, S Frei; On-board Systems Lab, TU Dortmund University; EMC EuropeLab https://t.co/4PcH1vSYE7 #paper https://t.co/q8QWRoBWJI


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October 23, 2019 at 10:13AM
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Oct 17, 2019

3rd Symposium on Schottky barrier MOS devices was held on October 4th, 2019 at the Amphi Bloch, Orme de Merisiers-CEA, Gif-sur Yvette (F) https://t.co/xfFGcUx5gl #paper https://t.co/j0WbRdUWiJ


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October 17, 2019 at 02:19PM
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Interlligent UK’s RF & Microwave Design Seminar |7 November 2019 | Møller Centre, Cambridge, UK” https://t.co/9wotXU6KZ5 #paper https://t.co/1chZlALkMb


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October 17, 2019 at 02:11PM
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ESSCIRC/ESSDERC will take place in Grenoble from Sept 14th to 17th 2020, and the website in on-line. Watch-out for more. Looking forward to meet you there! https://t.co/GVb5q2YpYh #paper https://t.co/z2u5MSs5Ia


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October 17, 2019 at 02:00PM
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Open Position - SiNANO - To work on the EPSRC funded project: Quantum Simulator for Entangled Nano-Electronics – The main aim is to go beyond the state of the art in device modelling of resonant tunnelling diode and single electron transistors. https://t.co/Vnul8S7GK7 #paper https://t.co/bPeudmiIaq


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October 17, 2019 at 01:57PM
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Do you know "flash memory"? It's a very small and important thing that comes in smartphones. But where and how is it used? #flashmemory that supports everyone's convenient life. Let's explore secrets with this book! A series by Gakken Manga https://t.co/FdEgh40jE4 #paper https://t.co/6WuKG5D5Ir


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October 17, 2019 at 10:15AM
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