Showing posts with label thin-film. Show all posts
Showing posts with label thin-film. Show all posts

Apr 25, 2024

[paper] Flexible TFT Electronics

Hikmet Çeliker, Wim Dehaene and Kris Myny
Multi-project wafers for flexible thin-film electronics by independent foundries.
Nature (2024)
DOI: 10.1038/s41586-024-07306-2

1. ESAT, KU Leuven, Leuven, Belgium
2. imec, Leuven, Belgium

Abstract: Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays large-area image sensors, microprocessors, wearable healthcare patches, digital microfluidics, and more. Although silicon-based complementary metal–oxide–semiconductor (CMOS) chips are manufactured using several dies on a single wafer and the multi-project wafer concept enables the aggregation of various CMOS chip designs within the same die, TFT fabrication is currently lacking a fully verified, universal design approach. This increases the cost and complexity of manufacturing TFT-based flexible electronics, slowing down their integration into more mature applications and limiting the design complexity achievable by foundries. Here we show a stable and high-yield TFT platform for the fabless manufacturing of two mainstream TFT technologies, wafer-based amorphous indium–gallium–zinc oxide and panel-based low-temperature polycrystalline silicon, two key TFT technologies applicable to flexible substrates. We have designed the iconic 6502 microprocessor in both technologies as a use case to demonstrate and expand the multi-project wafer approach. Enabling the foundry model for TFTs, as an analogy of silicon CMOS technologies, can accelerate the growth and development of applications and technologies based on these devices.

FIG:  Photograph of all three chips at once: the vintage WDC 65C02 in a 40-pin DIP package (left), the flex LTPS 6502 (middle) and the flex IGZO 6502 (right)


Acknowledgements: We thank PanelSemi (a system-on-film foundry service provider in Taiwan) for providing LTPS panels and Pragmatic for providing IGZO wafers as a verification of our designs, using their foundry-mode panel and wafer delivery services. Part of this work has received funding under the Horizon Europe programme from the European Research Council under grant agreement no. 101088591 ‘ORISON project’. Views and opinions expressed are, however, those of the authors only and do not necessarily reflect those of the European Union or the European Research Council. Neither the European Union nor the granting authority can be held responsible for them.