Showing posts with label revEDA. Show all posts
Showing posts with label revEDA. Show all posts

Jan 11, 2024

[github] new RevEDA Release

Revolution EDA Schematic/Symbol/Layout Editors
https://github.com/eskiyerli/revedaRelease

A new release of Revolution EDA is almost here, including a brand-new hierarchical layout editor with GDS export capability, revamped schematic, and symbol editors. Layout editor can use python-based parametric layout cells. The editor can also create vias and via arrays, paths (Manhattan, diagonal and free-angle), rectangles, polygons, pins and texts. Schematic editor can now import Spice subcircuits and create symbols for inclusion in the schematic editor. A cell can have more than one cellview such as SPICE, Verilog-A or symbol that can be used in the netlisting. The netlisting process can be controlled by a switch-view list or by a separate config view. Unlike leading commercial EDA systems, netlisting and GDS export process are running as separate threads and do not block the user's work.

Any interested parties are kindly invited to get in touch with Murat Eskiyerli, the lead RevEDA developer