Showing posts with label Insulator. Show all posts
Showing posts with label Insulator. Show all posts

Sep 23, 2020

[paper] Multi-Bridge-Channel Field Effect Transistor

Leakage Performance Improvement in Multi-Bridge-Channel Field Effect Transistor
(MBCFET) by Adding Core Insulator Layer 
Saehoon Joung1,2, Student Member, IEEE and SoYoung Kim2, Senior Member, IEEE 
SISPAD 2019 
DOI:10.1109/sispad.2019.8870498 

1Samsung Electronics Co. Foundry Division, Yield Enhancement, Process Integration Engineering Group, Ltd Kiheung, Republic of Korea
2College of Information and Communication Engineering,Sungkyunkwan University, Suwon,Gyeounggi-do, Republic of Korea

Abstract: Altering from existing planar devices to FinFETs has revolutionized device performance, but demands of leakage and gate controllability are increasing relentlessly. Gate all around field effect transistor (GAAFET) is expected to be the next-generation device that meets these needs. This paper suggests a way to improve the gate electrostatic characteristics by adding an oxidation process to the conventional multi-bridgechannel field effect transistor (MBCFET) process. The main advantage of the proposed method is that a device with ultimate electrostatic properties can be implemented without changing the complex and expensive photo-patterning. In the proposed device, the immunity of short channel effects is enhanced in a single transistor. And the performance of ring oscillator (RO) and SRAM was confirmed to be improved by TCAD mixed-mode simulation.


FIG: MBCFET Process Flow Comparison 
 
Acknowledgement: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2017R1A2B2003240). The TCAD tools were supported by the IC Design Education Center (IDEC).