Showing posts with label Halo implant. Show all posts
Showing posts with label Halo implant. Show all posts

Jun 8, 2021

[paper] MOSFET Threshold Voltage Extraction

Nikolaos Makris and Matthias Bucher (IEEE Member)
On MOSFET Threshold Voltage Extraction 
Over the Full Range of Drain Voltage Based on Gm/ID
arXiv:2106.00747v1 [physics.app-ph] 1 June 2021

Abstract: A MOSFET threshold voltage extraction method covering the entire range of drain-to-source voltage, from linear to saturation modes, is presented. Transconductance-to-current ratio is obtained from MOSFET transfer characteristics measured at low to high drain voltage. Based on the charge-based modeling approach, a near-constant value of threshold voltage is obtained over the whole range of drain voltage for ideal, long-channel MOSFETs. The method reveals a distinct increase of threshold voltage versus drain voltage for halo-implanted MOSFETs in the low drain voltage range. The method benefits from moderate inversion operation, where high-field effects, such as vertical field mobility reduction and series resistances, are minimal. The present method is applicable over the full range of drain voltage, is fully analytical, easy to be implemented, and provides more consistent results when compared to existing methods.
Fig: Extraction of threshold voltage for a long-channel MOSFET from transconductance-to-current ratio (TCR) covering linear to saturation modes. (a) GmUT /ID obtained from ID vs. VG characteristics measured at different values of VDS (long-channel n-MOSFET) together with model (b) Criterion for threshold voltage nGmUT /ID varies among two asymptotic values in linear and saturation modes.

Aknowlegements: This work was partly supported under Project INNOVATION-EL-Crete (MIS 5002772).

Related papers:
[i] T. Rudenko, V. Kilchytska, M. K. M. Arshad, J. Raskin, A. Nazarov and D. Flandre, "On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part I—Effect of Gate-Voltage-Dependent Mobility," in IEEE Transactions on Electron Devices, vol. 58, no. 12, pp. 4172-4179, Dec. 2011.
doi: 10.1109/TED.2011.2168226
[ii] T. Rudenko, V. Kilchytska, M. K. M. Arshad, J. Raskin, A. Nazarov and D. Flandre, "On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part II—Effect of Drain Voltage," in IEEE Transactions on Electron Devices, vol. 58, no. 12, pp. 4180-4188, Dec. 2011.
doi: 10.1109/TED.2011.2168227
[iii] T. Rudenko, V. Kilchytska, M. K. M. Arshad, J. Raskin, A. Nazarov and D. Flandre, "Influence of drain voltage on MOSFET threshold voltage determination by transconductance change and gm/Id methods," ULIS, Cork, Ireland, 2011, pp.1-4.
doi: 10.1109/ULIS.2011.5758012