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C4P MOS-AK/GSA ESSDERC/ESSCIRC Workshop: http://www.mos-ak.org/seville/
"Frontiers of the Compact Modeling for Advanced Analog/RF Applications"
The MOS-AK/GSA Workshop in Seville will be organized as an integral
part of the ESSDERC/ESSCIRC Conference. The MOS-AK/GSA Workshop is
HiTech forum to discuss the frontiers of the electron devices modeling
with emphasis on simulation-aware models. Original papers presenting
new developments and advances in the compact/spice modeling and its
Verilog-A standardization are solicited. Suggested topics include (but
are not limited to):
* Compact Modeling (CM) of the electron devices
* Verilog-A language for CM standardization
* New CM techniques and extraction software
* CM of passive, active, sensors and actuators
* Emerging Devices, CMOS and SOI-based memory cells
* Microwave, RF device modeling, high voltage device modeling
* Nanoscale CMOS devices and circuits
* Technology R&D, DFY, DFT and IC Designs
* Foundry/Fabless Interface Strategies
On-line abstract submission is open with the deadline on July 15, 2010.
Further details and updates: http://www.mos-ak.org/seville/
==========================================================
* Wroclaw: June 24-26 www.mixdes.org/Special_sessions.htm
* Tarragona: June.31-July.1 http://www.compactmodelling.eu/tc_programme.php
* Seville: Sept. 17 http://www.mos-ak.org/seville/
* California: Dec'2010 http://www.mos-ak.org/
==========================================================
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To post to this group, send email to mos-ak@googlegroups.com.
To unsubscribe from this group, send email to mos-ak+unsubscribe@googlegroups.com.
For more options, visit this group at http://groups.google.com/group/mos-ak?hl=en.
"Frontiers of the Compact Modeling for Advanced Analog/RF Applications"
The MOS-AK/GSA Workshop in Seville will be organized as an integral
part of the ESSDERC/ESSCIRC Conference. The MOS-AK/GSA Workshop is
HiTech forum to discuss the frontiers of the electron devices modeling
with emphasis on simulation-aware models. Original papers presenting
new developments and advances in the compact/spice modeling and its
Verilog-A standardization are solicited. Suggested topics include (but
are not limited to):
* Compact Modeling (CM) of the electron devices
* Verilog-A language for CM standardization
* New CM techniques and extraction software
* CM of passive, active, sensors and actuators
* Emerging Devices, CMOS and SOI-based memory cells
* Microwave, RF device modeling, high voltage device modeling
* Nanoscale CMOS devices and circuits
* Technology R&D, DFY, DFT and IC Designs
* Foundry/Fabless Interface Strategies
On-line abstract submission is open with the deadline on July 15, 2010.
Further details and updates: http://www.mos-ak.org/seville/
==========================================================
* Wroclaw: June 24-26 www.mixdes.org/Special_sessions.htm
* Tarragona: June.31-July.1 http://www.compactmodelling.eu/tc_programme.php
* Seville: Sept. 17 http://www.mos-ak.org/seville/
* California: Dec'2010 http://www.mos-ak.org/
==========================================================
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To post to this group, send email to mos-ak@googlegroups.com.
To unsubscribe from this group, send email to mos-ak+unsubscribe@googlegroups.com.
For more options, visit this group at http://groups.google.com/group/mos-ak?hl=en.
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