Mar 2, 2018

[paper] Compact modeling of SiC Schottky barrier diode and its extension to junction barrier Schottky diode

Dondee Navarro1, Fernando Herrera1, Hiroshi Zenitani2, Mitiko Miura-Mattausch1, Naoto Yorino2, Hans Jürgen Mattausch1,2, Mamoru Takusagawa3, Jun Kobayashi3 and Masafumi Hara3

Published 19 February 2018 • © 2018 The Japan Society of Applied Physics
Japanese Journal of Applied Physics, Volume 57, Number 4S

1 HiSIM Research Center, Hiroshima University, Hiroshima 739-8530, Japan
2 Graduate School of Engineering, Hiroshima University, Hiroshima 739-8530, Japan
3 Toyota Motor Corporation, Toyota, Aichi 470-0309, Japan

Abstract: A compact model applicable for both Schottky barrier diode (SBD) and junction barrier Schottky diode (JBS) structures is developed. The SBD model considers the current due to thermionic emission in the metal/semiconductor junction together with the resistance of the lightly doped drift layer. Extension of the SBD model to JBS is accomplished by modeling the distributed resistance induced by the p+ implant developed for minimizing the leakage current at reverse bias. Only the geometrical features of the p+ implant are necessary to model the distributed resistance. Reproduction of 4H-SiC SBD and JBS current–voltage characteristics with the developed compact model are validated against two-dimensional (2D) device-simulation results as well as measurements at different temperatures [read more: https://doi.org/10.7567/JJAP.57.04FR03]

Fig.: Electron current density in a JBS cross-section. JBS has a peak density at the n− region adjacent to the p+ implant.



Feb 28, 2018

[paper] Compact electro-thermal modeling of a SiC MOSFET power module under short-circuit conditions

Proceedings of 43rd Annual Conference of the IEEE Industrial Electronics Society
IECON 2017
Lorenzo Ceccarelli, Paula Diaz Reigosa, Amir Sajjad Bahman, Francesco Iannuzzo,
Frede Blaabjerg
Center of Reliable Power Electronics, Department of Energy Technology Aalborg University,
Pontoppidanstræde 101
9220 Aalborg, Denmark 

ABSTRACT: A novel physics-based, electro-thermal model which is capable of estimating accurately the short-circuit behavior and thermal instabilities of silicon carbide MOSFET multi-chip power modules is proposed in this paper. The model has been implemented in PSpice and describes the internal structure of the module, including stray elements in the multi-chip layout, self-heating effect, drain leakage current and threshold voltage mismatch. A lumped-parameter thermal network is extracted in order to estimate the internal temperature of the chips. The case study is a half-bridge power module from CREE with 1.2 kV breakdown voltage and about 300 A rated current. The short-circuit behavior of the module is investigated experimentally through a non-destructive test setup and the model is validated. The estimation of overcurrent and temperature distribution among the chips can provide useful information for the reliability assessment and fault-mode analysis of a new-generation SiC high-power modules [read more...]

Fig.: SiC MOSFET model structure. 

Feb 25, 2018

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