[mos-ak] [Final Program] 7th International MOS-AK Workshop; December 12, 2014 at Berkeley

 7th International MOS-AK Workshop

 Berkeley Friday, Dec. 12, 2014 

 Final Program  

 

 Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the 7th consecutive International MOS-AK Workshop which will be held at Berkeley, California, USA. The event is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool vendors. 

Venue:

Room 540 in Cory Hall

EECS Department

University of California, Berkeley

Final MOS-AK Workshop Program  
http://www.mos-ak.org/berkeley_2014/

Free on-line workshop registration:
http://www.mos-ak.org/berkeley_2014/registration.php

Postworkshop publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK/GSA Committee

WG181114

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NEW BOOK - Fabless: The Transformation of the Semiconductor Industry

 Fabless: The Transformation of the Semiconductor Industry
 By Daniel Nenni and Paul McLellan
 Foreword By TSMC

 The purpose of this book is to illustrate the magnificence of the fabless semiconductor ecosystem, and to give credit where credit is due by tracing the history of the semiconductor industry from both a technical and business perspective. [Book Preview]

Coupon code: LinkedIn2014

The author is offering to all LinkedIn connections a 50% off coupon code for the eBook version of "Fabless: The Transformation of the Semiconductor Industry". Feel free to forward this info to a friend or coworker. This eBook coupon expires on December 31, 2014. A paper version of the book is available on Amazon. For either version please click HERE for the SemiWiki shopping cart.

[mos-ak] Public release of MAPP at coming MOS-AK Meeting in Berkeley on Dec.12

 Join the NEEDS Group in Berkeley on Dec. 12 for the MOS-AK Meeting for the public release of MAPP: the NEEDS Matlab-based Model Analysis and Prototyping Platform.  

 read more:

• 7th International MOS-AK Compact Modeling Workshop
  
• nanohub.org: NEEDS Nano-Engineered Electronic Device Simulation Node
  
• Get Started On Compact Modeling by Colin McAndrew at Purdue for the Nov. 18-19 Workshop.
  
• Newest NEEDS compact model releases 
  
• MOS-AK Open Compact Modeling Directory
  

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Yannis Tsividis' Early Contributions to MOS Filters

In the 1970s, when the bipolar transistor was the undisputed king of analog integrated circuits (ICs), most electrical engineers regarded the MOS transistor as a second-rate device for ICs: it was a good switch, but a mediocre amplifier. As a graduate student at UC Berkeley, under the supervision of Paul Gray, Yannis Tsividis had a very different vision. He saw the MOS transistor as the future star for mixed-signal ICs and was excited to prove to the world he was right. The opening gambit was his thesis work demonstrating the first fully-integrated MOS opamp. This single achievement propelled him to the top of his generation of researchers and earned him a Berkeley PhD degree, a teaching appointment at Columbia University and a consulting position at Bell Laboratories.

[read more...]
REF:
Khoury, J.; Banu, M., "Yannis Tsividis' Early Contributions to MOS Filters," Solid-State Circuits Magazine, IEEE , vol.6, no.4, pp.36,40, Fall 2014
doi: 10.1109/MSSC.2014.2347772

i-MOS version 201410 release

  New release of the interactive Modeling and On-line Simulation Platform (i-MOS), version 201410 has been released. In this release we have launched some new features:

• Developing an ‘Equalizer’ module in the ‘Model’ page for easy model parameter tuning
• Accommodating multiple parameters in this module for users’ most convenience
• Improving the ‘Custom data’ function for manual parameter extractions
• Updating the TFET model e-TIM (previous e-TuT) to support multiple materials
• Including an am-bipolar current module in the e-TIM

The new  release is ready here i-MOS.

IEEE Swiss CAS/ED Workshop 2014 on Memristive Devices and Neuromorphic Applications

 IEEE Swiss CAS/ED Workshop 2014 on Memristive Devices and Neuromorphic Applications 

 (http://www.ieee.ch/chapters/cas-ed/cas-ed-news/2014-11-27/) 

Date: Friday 28 Nov, 2014
Time: 10:00-19:00
Place: UZH, Irchel Campus, Room Y35 F51 (morning session) Y10 03/04 (afternoon session), Building 55 Foyer (apero). Closest tram stop is Tram 9/10 at Irchel. See here for University of Zurich map.

At this one day workshop, experts in Memristive Devices and Neuromorphic Applications will present their recent advances in Circuits and Systems and Electron Devices. The workshop includes a demo and poster session, and a concluding apero.

Resistive memory devices also known as "memristors" are being actively researched to address the widening gap in performance between storage and the rest of the computing system. There is also a potential for such devices to serve simultaneously as both memory and logic, or even as components of a neuromorphic computing hardware based on brain architecture. The investigation of the use of these devices in a host of applications in science and technology are currently being explored. Swiss developers are very active in these fields and the area of neuromorphic computing. This one-day IEEE workshop brings them together with potential research and development partners and end users in industry and academia.

The presentations will cover a range of topics focus on memristive technology and possible computing applications. A poster session including demonstrations of relevant technologies will also be offered.

All presentations will be in English.

Registration: Registration is open to the public but is mandatory. There will be a registration fee which includes lunch and apero. Please register at www.iniforum.ch/casedws14/registration.php.

Registration will be closed by 14.11.2014 or when the maximum number of places is reached. Registration must be cancelled by 21.11.2014 for refund.

Posters and Demos registration: We invite demos and posters. Poster or demo presentations must also register for the workshop (see above). Posters or demos must be registered so that we can plan space for them. Please use this demo and registration form to register.

EDS VLSI Technology and Circuits TC Report

 EDS VLSI Technology and Circuits Technical Committee Report

 http://eds.ieee.org/eds-newsletters.html

The VLSI Technology and Circuits Technical Committee was formed in 1998 under the leadership of Professor Charles G. Sodini (MIT) and followed by Dr. H.-S. Philip Wong (IBM), Werner Weber (Infineon), Dr. James A. Hutchby (SRC) and Dr. Bin Zhao (Freescale Semiconductor). Since its formation, the VLSI Committee has made it their mission to identify new technical trends, help foster new technical concepts, and serve the emerging needs of the Electron Devices and Solid-State Circuits communities in VLSI. The committee members include many well recognized technical experts representing a very wide spectrum of technical expertise in VLSI devices, technology, and circuits. Every year the committee brainstorms (by email), ideas that are suitable for new workshops, special issues for a journals, panel sessions, and special sessions for conferences. Committee members then drive these ideas forward and find a way to make them happen; either by being the organizers themselves, or by finding suitable organizers for the topic. They work closely together with journal editors and conference organizers. It is much easier to attach new workshops to existing conferences, than to establish new conferences. 

[read more at http://eds.ieee.org/eds-newsletters.html]