Open, One year post doc position for development of HV transistor SPICE models

Education/Experience:

• PhD or Master/Dipl. Ing. in Physics or Electronic Engineering
• Experience in SPICE modeling (e.g. BSIM, EKV, PSP, HiSIM)

Place of Employment:

• Unterpremstaetten/Graz , Austria

Job Description / tasks responsibilities:

• Development of HV transistor SPICE models
• Parameter extraction and measurements for SPICE models
• Project management within the COMON project
• Writing documents and deliverables

Contact: Dipl. Ing. Ehrenfried Seebacher
Senior Manager Process and Device Characterization - Modeling

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austriamicrosystems AG
Operations - Process Developments
Schloss Premstaetten
8141, Unterpremstaetten, Austria
Tel: +43 3136 500 5487
Fax: +43 3136 500 5755

A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs

Venkatnarayan Hariharan, Juzer Vasi, V. Ramgopal Rao; Solid-State Electronics, Volume 53, Issue 2, February 2009, Pages 218-224

Abstract: In developing the drain current model of a symmetrically driven, undoped (or lightly doped) symmetric double-gate MOSFET (SDGFET), one encounters a transcendental equation relating the value of an intermediate variable β (which is related to the inversion charge areal density and also surface-potential) to the gate and drain voltages; as a result, it doesn’t have a closed form solution. From a compact modeling perspective, it is desirable to have closed form expressions in order to implement them in a circuit simulator. In this paper, we present an accurate closed form approximation for the inversion charge areal density, based on the Lambert-W function. We benchmark our approximation against other existing approximations and show that our approximation is computationally the most efficient and numerically the most robust, at a reduced but acceptable accuracy. Hence, it is suitable for use in implementing inversion charge based compact models.

DOI: 10.1016/j.sse.2008.11.006

Symmetric linearization method for double-gate and surrounding-gate MOSFET models

Gajanan Dessai, Aritra Dey, Gennady Gildenblat, Geert D.J. Smit; Solid-State Electronics, Volume 53, Issue 5, May 2009, Pages 548-556

Abstract: Symmetric linearization method is developed in a form free of the charge-sheet approximation present in its original formulation for bulk MOSFET. This leads to a core compact model of certain multiple-gate transistors that has the form almost identical to that used in a standard PSP MOSFET model. The accuracy of the proposed technique is verified by comparison with the exact results. The new core is compatible with the previous version of the double gate MOSFET model that has been found in agreement with the experimental data including short-channel effects and frequency response.

DOI: 10.1016/j.sse.2009.01.020

CEA-LITEN selects InfiniScale for Organic Electronic devices modeling

InfiniScale today announced that CEA-LITEN has selected InfiniScale’s TechModeler for its organic electronic devices modeling needs.
You can see by their public declarations that they are quite happy:

“InfiniScale’s modeling tool allowed us to shrink our development cycle by a large factor” commented Isabelle Chartier Organic Electroniv program manager at CEA-LITEN- “CEA-Liten is deeply involved in printing Organic Electronic devices and circuits, we target to demonstrate, before the end of 2009, a first all printed organic CMOS circuit. Modeling our devices versus design and technology parameters is critical for our technological developments. Therefore, fast prototyping and fast development cycles achieved with Infiniscale is key to stay on top of the Emerging and promising Organic Electronic market”

“We are pleased by CEA-LITEN commitment “said Dr Firas MOHAMED, CEO of Infiniscale “InfiniScale has taken position on this new industry where there is a need to grow at a fastest possible pace. After a close collaboration through an important R&D project on organic electronic (Printronics a Minalogic cluster project), CEA-LITEN decided to adopt our technology for its advanced organic devices modeling.

We are very pleased to see that our modeling technology, which is already recognized by major semi-conductor players, kept its promise for the organic ambitious industry”.

You can read the full press release here.

UCL invites applications for academic positions for the academic year 2010-2011

• Electronic circuits and mixed analog-digital systems
  
• Energy and power electronics
  
• The deadline for file submission is January 15th 2010 and all application's requirements are detailed on-line
  

An interesting paper in the Intl. Jornal of Numercal Modelling (vol 22(6))

This is not exactly compact modelling, but it's a nice thing to see:

SPICE-aided modelling of dc characteristics of power bipolar transistors with self-heating taken into account

Janusz Zarbski, Krzysztof Górecki
Department of Marine Electronics, Gdynia Maritime University, Morska 83, 81-225 Gdynia, Poland

Abstract
This paper deals with the problem of calculations of the dc characteristics of power bipolar transistors (BJTs) with self-heating taken into account. The electrothermal model of the considered devices dedicated for PSPICE is presented. The correctness of the model was verified experimentally in all ranges of the BJT operation. Two transistors - BD285 and 2N3055 - were arbitrarily selected for investigation. A good agreement between the measured and calculated characteristics of these transistors was observed.

You can access the online version here.

55th IEEE IEDM conference

The 55th annual IEEE IEDM conference will be held at the Hilton Baltimore on December 7-9, 2009 preceded by a day of Short Courses on Sunday, Dec. 6. The world¹s best scientists and engineers in the field of electronics will showcase their work in a program of papers, panels, special sessions, Short Courses and other events that will spotlight more leading work in more areas of the field than any other conference.

The advance registration deadline is November 16 and the deadline for hotel reservations is November 6. For registration and other information, visit the IEDM 2009 home page at http://www.ieee-iedm.org

As a novelty, IEDM can be followed in twitter and facebook... which I think is a good move.