NANOSIL kick-off meeting

NANOSIL is the name of a new European Commission-funded Network of Excellence devoted to the research in nanodevices, mostly based on Silicon. NANOSIL is the continuation of a previous Network of Excellence called SINANO (2004-2007).

NANOSIL started on January 1 2008 and will have a duration of three years. The kick-off meeting took place in Grenoble (France) on January 29 2008.

NANOSIL aims to integrate the excellent European research laboratories and capabilities at the European level in order to strengthen scientific and technological excellence in the field of nanoelectronic materials and devices for terascale integrated circuits. It will explore and assess all scientific and technological aspects of nanodevices (mostly based on Silicon) and operational regimes relevant to the 22nm technology node and beyond. Therefore, NANOSIL will provide a forward-look for the industry, enabling informed decisions to be taken on technology development to speed up technological innovation.

There are seven Flagship Projects in the areas of nanoscale CMOS (workpackage WP1) and post-CMOS (workpackage WP2), known as the “More Moore” and “Beyond-CMOS” domains. This work will be carried out through a network of joint processing, characterisation and modelling platforms. Alongside these technological Flagship Projects each workpackage also has a Visionary Project that will act as a forum to explore novel ideas bewteen academia and European industry.

The Flagship Projects will be "New Channel Materials" (including Strained SOI and GeOI devices), "Very Low Schottky Barrier MOSFETs", "Identification and appraisal of gate stack materials for the end of CMOS era", "Nanowires" (Silicon nanowires), "Carbon Electronics" (with emphasis on graphene devices), "Small slope nanoelectronic switch for low power integrated circuits”, and "Templated Self-Organization".

The Coordinator of NANOSIL will be Prof. Francis Balestra (INPG-MINATEC, Grenoble). A total 0f 28 European groups, including mine (URV, Spain), participate in NANOSIL.

Compact modeling is one of the activities in the Flagship Projects. My group will be mostly involved in that task. We plan to develop compact models of the novel devices addressed by NANOSIL.

Besides, NANOSIL will organize workshops and a modeling summer school.

EUROSOI+

The European Commission approved in 2007 the funding of the continuation of EUROSOI, the European Thematic Network on SOI Technology, Devices and Circuits.

The new EUROSOI network will be called EUROSOI+ and will have aduration of three years, starting from January 1 2008.

The EUROSOI network organizes every year the EUROSOI workshop. This year it took place in Cork, Ireland, from January 23 to 25. The Chairman was Prof. Jean Pierre Colinge, from Tyndall National Institute (Cork).

The EUROSOI workshop is already consolidated as the main European event devoted to SOI technology, devices and circuits.

The kick-off meeting of the new EUROSOI+ network took place during the workshop. The coordinator of EUROSOI+ is Prof. Francisco Gamiz, from the University of Granada (SPAIN). He was also the coordinator of the previous EUROSOI network.

The members of EUROSOI+ are: University of Granada (Spain), INPG (France), UCL (Belgium), SOITEC (France), VTT (Finland), CISSOID (Belgium), IMEC (Belgium), Philips (The Netherlands), EPFL (Switzerland), ISP-Kiev (Ukraine), IUE (Austria), WUT (Poland), XFAB (Germany), Chalmers (Sweden), Uppsala University (Sweden), Queens University of Belfast (UK), University of Twente (The Netherlands), CNRS (France), IMMS (Germany), CSIC (Spain), University of Liverpool (UK), POLITO (Italy), Universitat Rovira i Virgili (Spain), Umiversitat Autonoma de Barcelona (Spain), Universidad de Salamanca (Spain), UNIUD (Italy), Ditocom (France), CEA-LETI (France), ISEP (France) and Tyndall National Institute (Ireland).

The main goals of EUROSOI+ will be to support and increase collaborations between European groups regarding research in SOI technology, and to elaborate a roadmap and a state of the art documents about SOI technology. The website of EUROSOI is regularly update to include all news related to SOI.

Compact modeling of SOI devices is one of the topics addressed by EUROSOI+. Actually, I will be mostly in charge of the writing of the parts related to compact modeling in the roadmap and a state of the art documents.

The EUROSOI workshop in Cork was interesting and of real high level. Every participant got a gift that was very useful in Ireland: an umbrella.

2008 Device Research Conference

The 2008 Device Research Conference (DRC 2008) will take place in the University of California, Santa Barbara, on June 23-25 2008.

DRC is one of the oldest conferences in the field of electron devices. Every year, DRC brings together top scientists, researchers and graduate students from both the industry and academia. Their latest research results are not only presented, but also frankly discussed. The fact that DRC is always held in one university encourages the exchange of creative ideas.

Student participation in DRC is always strong. Travel support for students is offered. Besides, there is a very prestigeous Best Student Paper Award.

The technical program will include oral and poster presentations as well as three rump sessions.
The deadline for abstract submission is March 7 2008.

Topics include all aspects related to electronic and optoelectronic devices, including "modeling and simulation of devices". The Call for Paper indicates with detail the types of devices addressed. Even biological devices are mentioned.

A number of prestigeous researchers will give invited talks.

Finally, there will be an excellent social programme, as can be expected when a conference takes place in a university.

MOS-AK meeting in Eindhoven 1st announcement

The aim of the MOS-AK Meetings series is to provide an open forum for the presentation and discussion of recent research and development results in technology, physics, modeling and applications of advanced compact models. We will be focusing but not limiting the discussion to following topics:

* Advances in RF CMOS device characterization and modeling
* Compact model Verilog-AMS/VHDL-AMS standardization and validation
* Statistical modeling for nano CMOS/SOI technologies

The technical program of MOS-AK Meeting consists of one day of presentations given by noted academic and industry experts, also a posters session is foreseen:
http://www.mos-ak.org/eindhoven

The workshop program is still open and you are welcome to submit paper/poster and/or suggest other related topic for presentation and discussion. Selected papers will be published in the IJNM - MOS-AK publication partner.

Important dates:
----------------
* 2nd annoncement - February 25
* Final workshop program - March 24
* COMON kick-off meeting - April 3 at MiPlaza, Eindhoven
* MOS-AK Meeting - April 4 at MiPlaza, Eindhoven

Local Meeting Organizers:
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Mark de Haas, Co-ordinator of Electronic Measurement Laboratory (MiPlaza)
Nick Campbell, Senior Communications Manager

Further information including recommended hotels and driving directions will be posted at our web site, soon; please visit regularly: http://www.mos-ak.org

SINANO Institute

The SINANO (SIlicon NANOdevices) Institute, a new European association for research in Nanoelectronics, has been created. The SINANO Institute is composed of 16 top European institutions in the field of Nanoelectronics, and is intended to be one of the top European centres in Nanoelectronics, together with IMEC, LETI and Fraunhofer Institute. The Founding Members of the SINANO Institute participated in the former European Network of Excellence called SINANO (2004-07).

The kick-off meeting of the SINANO Institute took place on January 28 in Grenoble (France). The Internal Regulations were approved. Prof. Francis Balestra (INPG, France) was elected Director of the SINANO Institute. Prof. Olof Engström (Chalmers, Sweden) was elected Chairman of the General Assembly. The elected members of the Governing Board were: Emmanuel Dubois (IEMN, France), Heinrich Kurz (RWTH-Aachen, Germany), Enrico Sangiorgi (IUNET, Italy), Denis Flandre (UCL, Belgium) and Evan Parker (University of Warwick, UK).

The SINANO Institute will participate as a single entity in international projects. The Institute will develop scientific collaborations between the associated Members and national and international public and private entities that operate in the field of Nanoelectronics. The Institute will also develop collaborations with the industry, aimed at the exploitation of new ideas and concepts, their demonstration in prototype form and technological transfer.

The Founding Members of the SINANO Institute are:

Université Catholique de Louvain (UCL, Louvain-la-Neuve, Belgium),

AMO GmbH (Gesellschaft für Angewandte Mikro- und Optoelektronik mbH,
Aachen, Germany),

Forschungszentrum Jülich GmbH (Jülich, Germany),

RWTH Aachen University, Institut für Halbleitertechnik (IHT, Aachen, Germany),

Univ Rovira i Virgili (URV, Tarragona, Spain),

Consorzio Nazionale Interuniversitario per la Nanoelectronica (IUNET, Bologna, Italy),

Institut Polytechnique de Grenoble (INPG, Grenoble, France),

Université des Sciences et Technologies de Lille (USTL-IEMN, Lille, France),

IMEL, NCSR “Demokritos” (Athens, Greece),

Warsaw University of Technology (Poland),

Chalmers Tekniska Högskola AB (Göteborg, Sweden),

Kungliga Tekniska Högskolan (KTH, Stockholm, Sweden),

University of Glasgow (UK),

University of Liverpool (UK),

Newcastle University (UK),

University of Warwick (UK)

Wikipedia

A new update on the wikipedia: the entry for the EKV model now has been translated from English to Español, Ελληνικά, Polski, Italiano and Català. And there are more to come... I repeat my last call for colaboration: if any of you is interested in translating this (or other) entry into your native language, let us know once it is done...

Defects in organic electronic devices

A new paper has been recently published in physica status solidi (a): Defects in organic electronic devices, by T. P. Nguyen. I copy the abstract, but have a look at the paper:

"The performance of organic electronic devices depends strongly on the quality of the semiconductor used, and the transport process, in particular is greatly affected by the defect states of the material. Knowledge of trapping parameters is therefore of prime importance for studying organic devices. While defects in conventional semiconductors are well known and can be more or less controlled during processing, the formation of defects in organic materials is still not well understood, and consequently, it is difficult to control the defect states in organic devices. For defects that are electrically active or traps, techniques such as thermally stimulated currents, impedance spectroscopy, or deep level transient spectroscopy have been successfully used for determining the corresponding parameters (density, energy level, capture cross section). In this work, we review some fundamental aspects of trap analysis in organic devices by highlighting their role in the charge transport process in these materials. We present updated data from trap studies in polyfluorene derivative based diodes and we address specific problems in analyzing traps in polymers and organic semiconductors. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)"