MOS-AK Meeting in Graz

The Spring MOS-AK meeting was held on April 30 in Premstraetten (very close to Graz), Austria

The scope of Spring Meeting was noise compact modeling, but also included contributions on noise measurement and characterization. Different devices were considered: conventional bulk MOSFETs, lateral MOSFETs, multiple-gate MOSFETs.

It was a very interesting meeting, with the participation of top researchers in the field of noise and compact modeling, such as Christoph Jungemann or Mitiko Miura-Mattausch (who explained the implementation of noise modelling in the HiSIM bulk MOSFET model).

Furthermore, it was a very nice oportunity to visit the beautiful city of Graz, and to taste the delicious pumkin-based Styrian specialties as well as the great local wines.

New issue of the IEEE Trans. on Electron Devices

Some new papers from quite important people in this month's issue of the IEEE Trans. on Electron Devices:
First, A Compact Model for Valence-Band Electron Tunneling Current in Partially Depleted SOI MOSFETs From Gildenblat, McAndrew,... etc...

Second, Depletion-All-Around Operation of the SOI Four-Gate Transistor from Cristoloveanu et alter.

More statistical modelling

Have a look at this paper from Samsudin et al. in the Solid-State Journal. If you are interested in statistical variations (and perhaps you should...), it is a nice reading.

BSIM5

I've been having a look at the Solid-State Journal, and I've found a very interesting paper from Jin He et al. They present a charge based model: BSIM5. I strongly recommend having a look at the paper, since it is from a quite good guy and the topic is, at least, important.

MOS-AK meeting

By the way, this Friday the Spring Meeting of the MOS-AK will be held in Graz, Austria, with very interesting talks, including one on Verilog-AMS and GNU software. If there is anyone going there, please send some comments....

So long....

It has been a long time since the last entry in the blog... I regret (I mean: I'm happy...) that we've had too much work. Well, here you have a very interesting link. It is not very related to Compact Modelling, but it is VERY related to scientific communication. It is an article in the Sydney Herald Tribune reporting an study about powerpoint(tm) presentations... You should read it (it quite short)...

HiSIM model included in another simlator

Magma FineSim SPICE Supports STARC HiSIM Model with Proven 20x Faster Circuit Simulation and Nearly Exact Correlation to Silicon. Or so they say in their web. See the full press release for more details. However, I love one of the sentences: "STARC's mission is to contribute to the growth of the Japanese semiconductor industry by developing leading-edge system-on-a-chip (SoC) design technologies.". Well, I would think that their primary mission is creating value for they investors, but one never knows. Now seriously, it is good to see that people is beginning to provide support (or implementations) of HiSIM. I only hope that foundries will follow the path, instead of being stuck with good (well, perhaps not so much), old (yes it is) BSIM3.1. I know this is a version of many years ago, but I can promise you that I've been playing with a 120nm technology using it.

By the way, by the moment it seems that more people is implementing HiSIM than PSP... curious, isn't it?