Jan 13, 2021

IEEE-EDS SCV/SF Chapter January Seminar (Webex only)

Title: Compute-in-Memory with Emerging Nonvolatile-Memories: Challenges and Prospects
Speaker: Prof. Shimeng Yu, Georgia Institute of Technology
Friday, January 15, 2020 at noon – 1PM PDT
Please note that this seminar is now WEBEX participation only:

Webex Link 

Organizer contact: Hiu Yung Wong <hiuyung.wong@ieee.org>

Abstract: Compute-in-memory (CIM) is a new computing paradigm that addresses the memory-wall problem in the deep learning accelerator. In this presentation, first I will present our DNN+NeuroSim benchmark framework that is interfaced with Tensorflow/PyTorch to evaluate different device technologies for state-of-the-art DNN models. We will discuss about the pros and cons of various non-volatile memory candidates and the most important device specifications for inference/training, respectively. Second, I will present our RRAM-CIM prototype chips that are integrated with CMOS peripheral circuitry and its performance. Furthermore, we will show our experimental characterizations of the multilevel RRAM's variability and reliability and their impact on DNN inference accuracy. To overcome the challenges of the RRAM-CIM prototypes we identified, we propose monolithic 3D integration with back-end-of-line (BEOL) transistors as a potential solution.

Speaker Bio: Shimeng Yu is an associate professor of electrical and computer engineering at the Georgia Institute of Technology. He received the B.S. degree in microelectronics from Peking University in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University in 2011 and 2013, respectively. From 2013 to 2018, he was an assistant professor at Arizona State University. Prof. Yu's research interests are nanoelectronic devices and circuits for energy-efficient computing systems. His expertise is on the emerging non-volatile memories (e.g., RRAM, ferroelectrics) for different applications such as deep learning accelerator, neuromorphic computing, monolithic 3D integration, and hardware security. Among Prof. Yu's honors, he was a recipient of the NSF Faculty Early CAREER Award in 2016, the IEEE Electron Devices Society (EDS) Early Career Award in 2017, the ACM Special Interests Group on Design Automation (SIGDA) Outstanding New Faculty Award in 2018, the Semiconductor Research Corporation (SRC) Young Faculty Award in 2019, and the ACM/IEEE Design Automation Conference (DAC) Under-40 Innovators Award in 2020, etc. Prof. Yu is active in professional services. He served or is serving many premier conferences as technical program committee, including IEEE International Electron Devices Meeting (IEDM), IEEE Symposium on VLSI Technology, etc. He is a senior member of the IEEE.


Jan 12, 2021

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January 12, 2021 at 04:52PM
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[paper] Modeling Power GaN-HEMTs in SPICE

Utkarsh Jadli, Faisal Mohd-Yasin, Hamid Amini Moghadam, Peyush Pande*, Mayank Chaturvedi and Sima Dimitrijev
Modeling Power GaN-HEMTs Using Standard MOSFET Equations and Parameters in SPICE
Electronics 2021, 10, 130
DOI: 10.3390/electronics10020130

Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia;
*Electronics Department, Graphic Era (Deemed to Be University), Dehradun, Uttarakhand 248002, India;

Abstract: The device library in the standard circuit simulator (SPICE) lacks a gallium nitride based high-electron-mobility-transistor (GaN-HEMT) model, required for the design and verification of power-electronic circuits. This paper shows that GaN-HEMTs can be modeled by selected equations from the standard MOSFET LEVEL3 model in SPICE. A method is proposed for the extraction of SPICE parameters in these equations. The selected equations and the proposed parameter-extraction method are verified with measured static and dynamic characteristics of commercial GaN-HEMTs. Furthermore, a double pulse test is performed in LTSpice and compared to its manufacturer model to demonstrate the effectiveness of the MOSFET LEVEL3 model. The advantage of the proposed approach to use the MOSFET LEVEL3 model, in comparison to the alternative behavioral-based model provided by some manufacturers, is that users can apply the proposed method to adjust the parameters of the MOSFET LEVEL3 model for the case of manufacturers who do not provide SPICE models for their HEMTs.

Fig: Internal cross-sectional structure of GaN-HEMT

Acknowledgments: The authors would like to acknowledge the Innovative Manufacturing Co- operative Research Centre (IMCRC) for providing a PhD scholarship to the first author. We also acknowledge the School of Engineering and Built Environments (EBE) of Griffith University for funding this project. This work was performed in part at the Queensland node of the Australian National Fabrication Facility, a company established under the National Collaborative Research Infrastructure Strategy to provide nano- and micro-fabrication facilities for Australia’s researchers.

Jan 11, 2021

[paper] Stretchable transistors

Yahao Dai, Huawei Hu, Maritha Wang, Jie Xu* and Sihong Wang
Stretchable transistors and functional circuits for human-integrated electronics
Nat Electron (2021) 
DOI:10.1038/s41928-020-00513-5

Pritzker School of Molecular Engineering, The University of Chicago, Chicago, IL, USA
*Nanotechnology and Science Division, Argonne National Laboratory, Lemont, IL, USA


Abstract: Electronics with skin- or tissue-like mechanical properties, including low stiffness and high stretchability, can be used to create intelligent technologies for application in areas such as health monitoring and human–machine interactions. Stretchable transistors that provide signal-processing and computational functions will be central to the development of this technology. Here, we review the development of stretchable transistors and functional circuits, examining progress in terms of materials and device engineering. We consider the three established approaches for creating stretchable transistors: buckling engineering, stiffness engineering and intrinsic-stretchability engineering. We also explore the current capabilities of stretchable transistors and circuits in human-integrated electronics and consider the challenges involved in delivering advanced applications.
Fig: Stretchable sensor–amplifier system for pulse measurements [Nature 555

Acknowledgements: This work is supported by the start-up fund from the University of Chicago. J.X. acknowledges support from the Center for Nanoscale Materials, a US Department of Energy Office of Science User Facility, and the US Department of Energy, Office of Science, under contract no. DE-AC02-06CH11357.

REF:
[Nature 555] Wang, S. et al. Skin electronics from scalable fabrication of an intrinsically stretchable transistor array. Nature 555, 83–88 (2018).


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January 11, 2021 at 08:59PM
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[Technical Paper] Shunsuke Abe et al. ;Photonic integration based on a ferroelectric thin-film platform; Advantest Laboratories, Ltd. https://t.co/463lP5jlAi #semi https://t.co/d6jWVypZBA



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January 11, 2021 at 03:33PM
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[paper] Neuromuscular Junction‐on‐a‐Chip

Rianne de Jongh1, Xandor M. Spijkers1,2, Svetlana Pasteuning‐Vuhman1
Paul Vulto2 R. Jeroen Pasterkamp1
Neuromuscular Junction‐on‐a‐Chip: 
ALS disease modeling and read‐out development in microfluidic devices
Journal of Neurochemistry 
Open Access 31 December 2020
DOI: 10.1111/jnc.15289 

1 Department of Translational Neuroscience, University Medical Center Utrecht Brain Center, Utrecht University, Utrecht, The Netherlands.
2 Mimetas B.V., Organ-on-a-chip Company, Leiden, The Netherlands

Abstract: Amyotrophic lateral sclerosis (ALS) is a fatal and progressive neurodegenerative disease affecting upper and lower motor neurons with no cure available. Clinical and animal studies reveal that the neuromuscular junction (NMJ), a synaptic connection between motor neurons and skeletal muscle fibers, is highly vulnerable in ALS and suggest that NMJ defects may occur at early stages of the disease. However, mechanistic insight into how NMJ dysfunction relates to the onset and progression of ALS is incomplete, which hampers therapy development. This is, in part, caused by a lack of robust in vitro models. The ability to combine microfluidic and induced pluripotent stem cell (iPSC) technologies has opened up new avenues for studying molecular and cellular ALS phenotypes in vitro. Microfluidic devices offer several advantages over traditional culture approaches when modeling the NMJ, such as the spatial separation of different cell types and increased control over the cellular microenvironment. Moreover, they are compatible with 3D cell culture, which enhances NMJ functionality and maturity. Here, we review how microfluidic technology is currently being employed to develop more reliable in vitro NMJ models. To validate and phenotype such models, various morphological and functional read‐outs have been developed. We describe and discuss the relevance of these read‐outs and specifically illustrate how these read‐outs have enhanced our understanding of NMJ pathology in ALS. Finally, we share our view on potential future directions and challenges.

FIG: Overview of some of the morphological and functional read-outs that can be used
in NMJ-on-a-chip models for studying ALS disease mechanisms. 

Acknowledgements: We thank Dr. Ewout Groen and Prof. Eran Perlson for carefully reading the manuscript, and Frederik Schavemaker for help with preparing the Figures. Work in the laboratory of R.J.P. is supported by the ALS Stichting Nederland (TOTALS, ALS-on-a-Chip) and by the MAXOMOD and INTEGRALS consortia under the frame of E-Rare-3, the ERANet for Research on Rare Diseases.