Webinar Series by Distinguished Experts

	The National Academy of Sciences, India (NASI) - Delhi Chapter- and
	MHRD-Institution Innovation Council (IIC) Deen Dayal Upadhyaya College Chapter (University of Delhi) Under the aegis of DBT Star College Program

Jointly Organizes

Webinar Series by Distinguished Experts

	June 25, 2020 @ 10 am Indian Standard Time Printed and Flexible Electronics and Devices Dr. Jin-Woo Han Research Scientist, Center for Nanotechnology, NASA Ames Research Center, Moffett Field, California, USA
	July 03, 2020 @ 04:30 pm Indian Standard Time New chemistry and physics in magnetic oxides Prof. J. Paul Attfield, FRS FRSE FRSC, Foreign Fellow INSA Professor of Materials Science at Extreme Conditions School of Chemistry, Centre for Science at Extreme Conditions, The University of Edinburgh, Edinburgh
	July 09, 2020 @ 06:30 pm Indian Standard Time Prof. Katepalli Sreenivasan, Foreign Fellow INSA Dean Emeritus of NYU Tandon School of Engineering; The Eugene Kleiner Professor for Innovation in Mechanical Engineering; Professor of Physics (Faculty of Arts and Science); Mathematics (Courant Institute of Mathematical Sciences)
	July 10, 2020 @ 01:30 India Standard Time Can Future Energy Needs be met Sustainably? Prof. Sir Chris Llewellyn Smith, FRS, FAPS (USA), Honorary Fellow, IOP (UK), Foreign Fellow INSA(India) Rudolf Peierls Centre for Theoretical Physics Parks Road, Oxford OX1 3PU
	July 11, 2020 @ 03:30 pm Indian Standard Time Are we there yet? How do cells find their way? Prof. Philip K. Maini, FRS, FIMA, FRSB, FMedSci, Foreign Fellow INSA (India) Wolfson Centre for Mathematical Biology Mathematical Institute, Andrew Wiles Building, Radcliffe Observatory Quarter Woodstock Road, Oxford
	July 14, 2020 @ 04:30 pm Indian Standard Time The influence of infection on Society before Covid19 Prof. Sir Peter Julius Lachmann, FRS, FRCP, FRCPath, FMedSci, Foreign Fellow INSA(India) Fellow, Emeritus Sheila Joan Smith Professor of Immunology Christ College, University of Cambridge

No registration fee to attend the Lecture. However, all interested should register via Google form on or before June 22, 2020 to attend the lectures via CISCO Webex/Google Meet. Link for Google form:

https://docs.google.com/forms/d/e/1FAIpQLSeMMpMi2ABiHoZ6p1SuntqnLkl-9k2E-dmmOXb5quFUkpDWuw/viewform

---

Organizer: Prof. Ajoy Ghatak, Chairperson - NASI Delhi Chapter & Prof. Anurag Sharma, Secretary - NASI Delhi Chapter

Coordinator:

Dr. Manoj Saxena, MNASc and Executive Committee Member-NASI Delhi Chapter

Associate Professor, Deptt. of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi

Dr. Geetika Jain Saxena, Associate Professor, Department of Electronics, Maharaja Agrasen College, University of Delhi, New Delhi

Stay up to date with the latest developments in the MEMS areas with IEEE RightNow. Access for J-MEMS. Enjoy temporary Open Access to selected featured publications https://t.co/mxoRhbT802 #paper https://t.co/9h5EV2mEBf

Stay up to date with the latest developments in the MEMS areas with IEEE RightNow. Access for J-MEMS. Enjoy temporary Open Access to selected featured publicationshttps://t.co/mxoRhbT802#paper pic.twitter.com/9h5EV2mEBf

— Wladek Grabinski (@wladek60) June 23, 2020

from Twitter https://twitter.com/wladek60

June 23, 2020 at 11:56AM
via IFTTT

[paper] “Extrinsic” Compact Model of the MOSFET Drain Current

V. O. Turin, R. S. Shkarlat, G. I. Zebrev, B. Iñiguez and M. S. Shur

The “Extrinsic” Compact Model of the MOSFET Drain Current Based on a New Interpolation Expression for the Transition Between Linear and Saturation Regimes with a Monotonic Decrease of the Differential Conductance to a Nonzero Value

2020 4th IEEE EDTM, Penang, Malaysia

2020, pp. 1-4

doi: 10.1109/EDTM47692.2020.9117810

Abstract: Previously, we proposed a new interpolation expression to bridge the transition between the linear and the saturation regimes of “intrinsic” MOSFET. This approach, in contrast to the traditional one, gives a monotonic decrease of the differential conductance from the maximum value in the linear regime to the minimum value in the saturation regime. Later, we proposed a linear approximation for an “extrinsic” MOSFET drain current dependence on the “extrinsic” drain bias in the saturation regime for not very high drain bias when nonlinear effects can be neglected. To obtain this approximation, an equation for the output differential resistance of the “extrinsic” MOSFET in saturation regime was obtained, that is similar to the result known from the theory of the common source MOSFET amplifier with source degeneration. In this paper, we combine these two results and present an “extrinsic” compact model for a short-channel MOSFET above threshold drain current with proper account of the differential conductance in the saturation regime.

[paper] Analog/RF Tri-metal Gate FinFET

N. G. P, S. Routray and K. P. Pradhan

Assessment of Analog/RF performances for 10 nm Tri-metal Gate FinFET

2020 4th IEEE EDTM; 2020, pp. 1-4

Penang, Malaysia

DOI: 10.1109/EDTM47692.2020.9117846

Abstract: Reduction in parasitic capacitance and resistance in FinFET is quite necessary in order to achieve high performance. In this paper, an intensive study on structural advancement in three different ways is implemented in basic FinFET structure such as (a) addition of thin silicide layer as interfacial layer between the contact and source/drain (b) extended and elevated source/drain (c) addition of hybrid spacer. Additionally, comparative study on the analog and RF performance is performed and analyzed for this structure between single material gate (SMG) and tri material gate (TMG) FinFET with all above enhancements. The analog parameters that have been analyzed are transconductance (gm), transconductance generation factor (TGF), output conductance (gd), and intrinsic gain (gm/gd). Similarly, the RF parameters like gate capacitance (CGG), cut-off frequency (fT), transconductance frequency product (TFP), gain frequency product (GFP), and gain transconductance frequency product (GTFP) are reported. Even though there is a degradation in the mobility for the TMG FinFET, but on a whole provides better performance. Furthermore, the effect of temperature on the drain current and transconductance has been shown for the TMG structure by varying the temperature from 200 to 350K with intervals of 50K which would be the extension to this paper. Analysis gives a potential overview on different structural improvement in order to achieve higher performance.

Fig. I. Top view of the proposed FinFET structure

Fig. II. (a) Gate capacitance (b) cutoff frequency (c) intrinsic delay (d) TFP (e) GFP (f) GTFP plots by variation of gate material.

[virtual] ToM2020/2 Announcement

ToM2020/2 Course

September, 8th, 2020
    14.00-17.30    Danilo Gerna (Melexis Technologies), “Advanced Hall Element Based Magnetic Sensors Front End Design”

September, 9th, 2020
    9.00-12.30    Carlo Samori (Milan Politechnic), “PLL: From Analog to Digital and Recent Trends”
    14.00-17.30    Alex Tranca (Infineon), “Robust Design of Smart Power ICs for Automotive Applications, with Focus on Load Current Sensing”

September, 10th, 2020
    9.00-12.30    Alfio Dario Grasso (Univ. Catania), “Ultra-Low Power Amplifiers for IoT Nodes”
    14.00-17.30    Gabriella Ghidini (STMicroelectronics), “Dielectric Reliability in Microelectronics”

In this particular situation, the PhD School at University of Milan-Bicocca decided to fully support the costs of the ToM2020/2 course, whose participation will then be free-of-charge for the attendees. However, for proper managing internet access to the virtual ToM2020/2 course, registration is mandatory at the following website:
http://www.innotechevents.com/index.php?page=ToM/RegistrationForm.html

Only registered participants will receive access information for the course.
At the end of the course, an exam will be proposed for certifying the positive attendance (please register to the exam with the course registration).
We look forward to virtually meeting you !!!!

More information at:
http://www.innotechevents.com/index.php?page=ToM/ToM.html

[virtual] IEEE EDS DL Mini-Colloquium at MIXDES Wroclaw

EDS Distinguished Lecturer Mini-Colloquium 

"Semiconductor-based sensors - technology, modeling, applications" 

(virtual at MIXDES), June 27, 2020

Chairs: Wladek Grabinski, Daniel Tomaszewski

10.00-10.45	Arokia Nathan "Ultralow Power, High-Resolution Sensor Interfaces" EDS Distinguished Lecturer, Cambridge Touch Technologies, UK; E-mail: an299@cam.ac.uk
10.45-11.30	Mike Schwarz "Sensor Design – From Prototype to Series" Robert Bosch GmbH, 72703 Reutlingen,Germany; E-mail: Mike.Schwarz@de.bosch.com
12.00-12.45	Benjamin Iñíguez "Compact Modeling and Parameter Extraction for Oxide and Organic Thin Film Transistors (TFTs) from 150K to 350K" EDS Distinguished Lecturer, Department of Electrical, Electronics Engineering and Automatic Control Engineering, Universitat Rovira i Virgili, 43007 Tarragona, Spain; E-mail: benjamin.iniguez@urv.cat
12.45-13.30	Teoder Gotszalk " Microsystem Electronics and Photonics " Faculty of Microsystem Electronics and Photonics, Wroclaw University of Technology, Poland; E-mail: teodor.gotszalk@pwr.edu.pl
13.30-14.15	Mina Rais-Zadeh "Phase change electro-optical devices for space applications" (recorded) EDS Distinguished Lecturer, NASA Jet Propulsion Lab., California Institute of Techn., USA; E-mail: minar@umich.edu

#SilTerra - #MEMS Technology Roadmap https://t.co/X0g0M0ImoL #paper https://t.co/n0Nthns32a

#SilTerra - #MEMS Technology Roadmap https://t.co/X0g0M0ImoL #paper pic.twitter.com/n0Nthns32a

— Wladek Grabinski (@wladek60) June 19, 2020

from Twitter https://twitter.com/wladek60

June 19, 2020 at 10:29AM
via IFTTT