[C4P] Speak at Open Source Summit Europe 2025

Present your work + ideas in Amsterdam, 25–27 August!

View in browser The Call for Proposals is officially open for Open Source Summit Europe 2025, taking place 25–27 August in Amsterdam! This is your opportunity to present innovative ideas, spark meaningful discussions, and help shape the future of open source. We're looking for speakers across a variety of key topics, including: Cloud & Containers Digital Trust Diversity, Equity, Inclusion & Accessibility Digital Trust Embedded Linux Conference Linux Open Source 101  Operations Management OpenGovCon Open Source Leadership  OSPOCon  Safety-Critical Software Standards & Specifications Technical Documentation Zephyr Developer Summit Learn more about all tracks and suggested topics. Proposals are due by Monday, 14 April at 23:59 CEST.  SUBMIT TO SPEAK >> The Linux Foundation is committed to increasing diversity, equity, and inclusion in open source, starting on the conference stage. We encourage submissions from marginalized communities and first-time speakers—reach out if you need help with your proposal! 📣 More Opportunities to Speak in Amsterdam AI_dev: Open Source GenAI & ML Summit Europe (28-29 August) Calling all AI developers and researchers! Submit your proposal to speak on topics like MLOps, GenOps, Responsible AI, and more at this premier open source AI event. Join us in shaping the future of generative AI, machine learning, and open source innovation! Learn more + submit by Monday, 14 April. Linux Security Summit Europe (28-29 August) Present at the leading technical forum for Linux security. Share your insights on topics like cryptography, IoT security, OS hardening, and more with top community experts and maintainers driving innovation in Linux security. Learn more + submit by Tuesday, 6 May. 🎟️ Registration is OPEN!   Not planning to speak but still want to attend? Register by 9 June and save with early bird pricing! See what's included in your registration fee - including lunch! 🥪 Are you a small business owner, academic, government employee, or hobbyist? Check out our special rates with fees starting at USD$275. Need financial assistance? Explore our diversity and need-based scholarship program and apply by 21 July. REGISTER NOW + SAVE >> 🤝 Become a Sponsor   Sponsoring Open Source Summit Europe connects your organization with a diverse audience of open source practitioners, offering unparalleled opportunities to build brand recognition, showcase thought leadership, and forge valuable partnerships. This premier event enables you to engage with multiple open source communities, recruit top talent, and generate high-quality leads - all in one place. BECOME A SPONSOR >> Thank You to Our Sponsors! DIAMOND GOLD SILVER BRONZE This email was sent by: The Linux Foundation Events 548 Market St, PMB 57274, San Francisco, CA 94104-5401, United States Subscription Center

[paper] Benchmarks for SPICE AI/ML Modeling

Colin C. McAndrew, Andries J. Scholten, Kiran K. Gullapalli, Yogesh Chauhan, and Kejun Xia

Benchmarks for SPICE Modeling and Parameter Extraction Based on AI/ML

IEEE Transactions on Electron Devices (2025)

DOI: 10.1109/TED.2025.3537952

1 Computer Engineering, Iowa State University, (USA)
2 NXP Semiconductors N.V., Eindhoven (NL)
3 NXP Semiconductors N.V., Austin (USA)
4 IIT Kanpur, (IN)
5 TSMC, Hsinchu (TW)

Abstract: Over the past decades, the number of submitted articles that use numerical approaches for SPICE models or for characterization (extraction) of parameters of existing SPICE models has grown significantly. Many of those articles rely on synthetic data, generated either from technology computer-aided design (TCAD) or from physical SPICE model simulations; most do not model/fit measured data. Furthermore, those articles do not evaluate the physical correctness, smoothness/monotonicity, or asymptotic correctness of the approach they propose. That is sufficient for initial evaluation of proposed techniques. However, it does not prove that they are “industrial strength.” This article presents benchmarks/guidelines for the proposed artificial intelligence (AI)/machine learning (ML) SPICE modeling and characterization techniques to try to help them become practical and useful.

TAB: CHECKLIST FOR MODELS

Capability	Existing State-of-the-Art	Proposed AI/ML Approach	Best Prior AI/ML Approach
obeys the laws of thermodynamics	✓	?	?
accurate DC modeling for all terminal currents, on relevant log/linear scale	✓	?	?
accurate capacitance/charge modeling	✓	?	?
models DC and capacitance interaction where relevant	✓	?	?
accurate modeling of high-frequency/non-quasi-static effects where relevant	✓	?	?
works for large-signal transient simulation, including delay effects	✓	?	?
accurate noise modeling	✓	?	?
has full geometry dependence	✓	?	?
has complete temperature dependence	✓	?	?
models all necessary LDEs	✓	?	?
behaves “well” for unreasonable geometry or temperature or bias	✓	?	?
exhibits physical monotonicity over bias, geometry, and temperature	✓	?	?
is smooth (ideally C∞-continuous)	✓	?	?
exhibits relevant physical symmetries (currents, charges, their derivatives)	✓	?	?
exhibits asymptotic correctness over geometry, temperature, and bias	✓	?	?
includes modeling of electrothermal effects (with frequency dependence)	✓	?	?
includes, or enables, modeling of global and local statistical variation	✓	?	?
includes, or enables, modeling of aging	✓	?	?
enables modeling of parasitics for different layouts	✓	?	?
is verified to converge reliably in at least one circuit simulator	✓	?	?

[mos-ak] MIXDES 2025 deadline reminder

Dear Colleagues,

I would like to remind you about the upcoming MIXDES 2025 regular paper submission deadline, which passes within 2 weeks.  If you are going to contribute, I encourage you to register your paper as soon as possible. You will be able to update the paper details and the document file at any time till the final paper version deadline (May 15^th, 2025). The early paper registration will allow us to take care of your paper just now, especially start the reviewer assignments.

To submit the paper, you need to log on to the MIXDES Conference website and follow the link "Submit a paper". After successful paper registration, you should receive a confirmation email and the paper should appear in the "User home" page. From this page, you may later update already registered papers by just clicking on its title.

I would like to kindly ask you to forward the information to your colleagues who may be interested in the conference topics. The most important information about the event can be found in Call for Papers

Important dates:

• Conference place and days: Szczecin, Poland, 26-28 June 2025
• Paper submission deadline: 1 March 2025
• Notification of acceptance: 30 April 2025
• Final paper versions: 15 May 2025

If you have any questions, please do not hesitate to contact me.

With best regards,

Mariusz Orlikowski

MIXDES 2025 Conference Secretary

[paper] Cryo HiSIM Compact Model

Dondee Navarro, Chika Tanaka, Kyoto Institute, Shin Taniguchi, Kazutoshi Kobayashi, Michihiro Shintani and Takashi Sato

Physics-based Modeling to Extend MOSFET Compact Model for Cryogenic Operation

(Invited Paper) ASPDAC ’25, January 20–23, 2025, Tokyo, Japan

DOI: 10.1145/3658617.3703137

1 KIOXIA Corporation Yokohama (J)

2 Kyoto Institute of Technology Kyoto (J)

3 Kyoto University Kyoto (J)

Abstract: This paper extends the low-temperature modeling capabilities of an industry-standard compact metal-oxide-semiconductor field-effect transistor (MOSFET) model by incorporating physics-based representations of cryogenic effects in semiconductors. Specifically, the incomplete dopant ionization effect is integrated into the bulk Fermi potential calculation of the compact model and applied as a threshold voltage shift in the formulation of Poisson’s equation. Temperature-related models for bandgap energy, saturation velocity, and contact resistance at the source/drain regions are also enhanced. Using transistors fabricated with 22nm process technology, we demonstrate that this consistent modeling approach accurately reproduces current-voltage and threshold voltage-temperature characteristics across a temperature range from 300K to 4K.

FIG: Extracted Vth-T and SS-T characteristics from measurements

and extended HiSIM model simulations.

Acknowledgments: This work was also supported through the activities of d-lab VDEC, the University of Tokyo, in collaboration with NIHON SYNOPSYS G.K., Cadence Design Systems, and Siemens Electronic Design Automation Japan K.K.

[C4P] SBCCI 2025

 SBCCI2025

WWW.SBCCI.ORG.BR

SBC/SBMicro/IEEE 38th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN

August 25 to 29, 2025, Manaus, BRAZIL

CHIP IN THE JUNGLE

CALL FOR PAPERS

SBCCI is an international forum dedicated to integrated circuits and systems design, test and electronic design automation (EDA), held annually in Brazil. The 38th SBCCI will take place in Manaus, State of Amazon, Brazil. The goal of the symposium is to bring together researchers in the areas of EDA, design and test of integrated circuits and systems. The scope of the symposium includes technical sessions, tutorials and panels, as well as an exhibition and working group meetings. The proceedings will be published by the IEEE Xplore. Manuscripts must contain a maximum of 4 pages, with one additional optional 5th page containing only references. The manuscripts should follow the IEEE two-column, US-Letter format and be prepared for double-blind review. The program committee will not consider submissions of manuscripts previously published by other conferences or journals. The best papers presented at the symposium will be invited to resubmit an extended version to be considered for publication at the IEEE Design & Test and at the JICS (Journal of Integrated Circuits and Systems). Information about paper submission are available at the conference webpage.

The areas of interest include:

• System level modeling and synthesis
• High-level and logic synthesis
• Physical design of ICs and systems
• EDA – electronic design automation
• Analog, digital, and mixed signal design
• Low power tools and design techniques
• Embedded systems and cyber-physical systems design
• System-on-chip, IP reuse and platform-based design
• Verification, simulation, emulation, and prototyping techniques
• Reconfigurable architectures and novel applications of FPGAs
• Nanoelectronics, nanoarchitectures and nanocomputing
• Hardware-software co-design and co-verification
• Design and modeling languages and applications
• Testability issues, design for test techniques

Important Dates:

• Paper Submission Deadline: March 31, 2025
• Notification of Acceptance: May 20, 2025
• Camera-Ready Deadline: June 10, 2025

Sponsored by:

SBC - Brazilian Computer Society
SBMicro - Brazilian Microelectronics Society
IEEE Circuits & Systems Society
IEEE CEDA - Council on EDA

Co-Sponsored by:

IFIP WG10.5 - International Federation for Information Processing

Organized by:

UEA - Universidade do Estado do Amazonas
UFRGS - Universidade Federal do Rio Grande do Sul

Organizing Committee

General Chairs

Edgard L. O. Silva, UEA, Brazil

Ricardo Reis, UFRGS, Brazil

Program Chairs

Cristina Meinhardt, UFSC, Brazil

Gracieli Posser, Cadence, USA

Tutorial Chairs

Jose de La Rosa, CNM, Spain

André Mariano, UFPR, Brazil

Finance Chairs

Raimundo Correa de Oliveira, UEA, Brazil

Paulo Butzen, UFRGS, Brazil

Calebe Conceição, UFS, Brazil

Publication Chair

Claudio Diniz, UFRGS, Brazil

Publicity Chair

Fabián Olivera, CEFET-RJ, Brazil