Jun 7, 2021

[paper] JART VCM v1 Verilog-A Compact

Model User Guide
Christopher Bengel, David Kaihua Zhang, Rainer Waser, Stephan Menzel

Electronic Materials Research Laboratory; RWTH Aachen University
Forschungszentrum Jülich

Abstract: The JART VCM v1a model was developed to simulate the switching characteristics of ReRAM devices based on the valence change mechanism. In this model, the ionic defect concentration (oxygen vacancies) in the disc region close to the active electrode (AE) defines the resistance state. The concentration changes due to the drift of the ionic defects. Furthermore, these oxygen vacancies act as mobile donors and modulate the Schottky barrier at the AE/oxide interface. In this model, Joule heating is considered, which significantly accelerates the switching process at high current levels. Since the JART VCM v1b model represents an improvement of the JART VCM v1a model, this user guide will have its focus on the JART VCM v1b model. Here, the equivalent circuit diagram (ECD) as well as some equations have been modified to explain the switching dynamics more accurately  Based on the JART VCM v1b model, a variability model was developed, which includes both device-to-device and cycle-to-cycle variability. In terms of the device-to-device variability, the VCM cells are initiated with statistical distributed parameters: filament lengths, filament radii and maximum and minimum values for the oxygen vacancy concentration in the disc. The cycle-to-cycle variability is achieved by changing the four quantities during SET and RESET. The latest extension of the JART VCM v1b also includes RTN, which is based on statistical jumps of oxygen vacancies into and out of the disc region.

Fig: Equivalent circuit diagram of the JART VCM v1b model (a) 
along with the electrical model in Verilog-A (b).

The Verilog-A code of this model can be downloaded here (Verilog-A file).
The User Guide for this model version can be downloaded here (User Guide PDF).








[paper] Compact Modeling of Flicker Noise in HV MOSFETs

Ravi Goel (Student Member, IEEE), Yogesh Singh Chauhan (Fellow, IEEE) 
Compact Modeling of Flicker Noise in High Voltage MOSFETs and Experimental Validation 
In 2021 IEEE Latin America Electron Devices Conference (LAEDC), pp. 1-4. IEEE, 2021 
DOI: 10.1109/LAEDC51812.2021.9437922

*Department of Electrical Engineering, Indian Institute of Technology Kanpur, India

Abstract: An analytical model of flicker noise (also called 1/f or low frequency noise) for the drift region is developed to formulate a 1/f model for high voltage MOSFETs using the subcircuit approach in this work. For halo doped drain extended MOSFET (DEMOS), the contribution factors of halo, channel and drift regions are obtained to capture anomalous behavior of 1/f noise. Similar to Halo doped DEMOS, for LDMOS, the contribution factors for channel and the drift region are obtained to capture the SID for different drain biases and channel lengths. The proposed model is validated with measurement data of 50V LDMOS and DEMOS.

Fig: Halo doped DEMOS and its sub-circuit equivalent. In halo doped DEMOS, the channel is divided into halo region and channel region, followed by drift region. In LDMOS, the channel is followed by the drift region. CFsh, CFch, and CFdrift are the contribution factors and are calculated using small-signal analysis.

Acknowledgments: The authors thank Sarvesh S. Chauhan for his valuable feedback. This work was partially supported by the Swarna Jayanti Fellowship (Grant No. – DST/SJF/ETA-02/2017- 18) and FIST Scheme (Grant No. – SR/FST/ETII-072/2016) of the Department of Science and Technology, India and Berkeley Device Modeling Center (BDMC).

Jun 3, 2021

#top10 biggest semiconductor companies last 2020 year



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Jun 2, 2021

[paper] Effect of the AC-Signal Frequency on Flat-Band Voltage of Al/HfO2/SiO2/Si Structures

Andrzej Mazurak, Bogdan Majkusiak
Investigation of the Anomalous Effect of the AC-Signal Frequency 
on Flat-Band Voltage of Al/HfO2/SiO2/Si Structures
Solid-State Electronics (2021) SSE 108107 
DOI:10.1016/j.sse.2021.108107

*TU Warsaw, Institute of Microelectronics and Optoelectronics, Koszykowa 75, 00-662 Warsaw, Poland

Abstract: MIS structures with double-layer HfO2/SiO2 gate stacks were fabricated. The admittance measurements revealed an anomalous voltage shift of the capacitance-voltage characteristics, modulated by the ac signal frequency. The effect is discussed in terms of the oxide charge modulation through the frequency dependent leakage mechanism.
Fig: Measured Gpm conductance–voltage characteristics for the n-type MIS structure.
  • An anomalous effect of the ac-signal frequency on the voltage shift of the CV characteristics of Al/HfO2/SiO2/Si devices was observed.
  • The observed effect is stable, reproducible, and reversible and is not driven by the measurement procedure or the measurement protocol parameters.
  • The effect is explained through a frequency dependent leakage conductance which affects the electric charge trapped interior the gate stack.
  • A linear dependence of the leakage conductance on the ac signal frequency is observed.

Jun 1, 2021

#Japan approves #chip development project with #TSMC



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