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Dec 3, 2020
[EMPHASIS] Virtual Launch Event
of EMPHASIS Research Centre
University of Cyprus
In case you missed any parts of the event, the recording can be found at the link below on our YouTube channel:
For more information, please reach out
iezekiel@ucy.ac.cy EMPHASIS Director
Sincerely,
Chrysafis Andreou, PhDLecturerDepartment of Electrical and Computer EngineeringEmphasis Research CentreUniversity of Cyprus
[FOSDEM 2021] Open Source Computer Aided Design and Modeling devroom
We are pleased to announce the CfP for:
Open Source Computer Aided Design and Modeling devroom
at FOSDEM 2021,
on Sunday, 7 February 2021
FOSDEM website:
FOSDEM Code of Conduct:
We hope you'll join us for a full day of talks, demos and interesting discussions on designing, modeling and testing hardware using Open Source tools. This year's event will be fully virtual and will feature multiple channels for talks, Q&A as well as hallway discussions.
We welcome any talk proposals about the creation of physical objects.
Topics of interest include, but are not limited to:
- Open Hardware projects
- Circuit Design
* Printed circuit board design tools
* Circuit simulation
- 3d modeling and analysis
* Solid modeling tools
* Meshing, modeling and transforming physical representations
* Finite element analysis
- 3d printing
* 3d slicing tools
* Motor control
- Machine design and integration
* ECAD/MCAD integration
* Thermal analysis
* Wire modeling
- Physical Model Data storage
* Data representation and optimization
* Version control in hardware data storage
* Collaborative and team-based hardware design techniques
Slots will be allocated for short (20 minutes) and long (40 minutes) talks. Speakers need to specify their preferred format. Both include time for questions and answers. Depending on the number of submissions, submitters may be asked to utilize an alternate time format.
The submission process
* Printed circuit board design tools
* Circuit simulation
- 3d modeling and analysis
* Solid modeling tools
* Meshing, modeling and transforming physical representations
* Finite element analysis
- 3d printing
* 3d slicing tools
* Motor control
- Machine design and integration
* ECAD/MCAD integration
* Thermal analysis
* Wire modeling
- Physical Model Data storage
* Data representation and optimization
* Version control in hardware data storage
* Collaborative and team-based hardware design techniques
Slots will be allocated for short (20 minutes) and long (40 minutes) talks. Speakers need to specify their preferred format. Both include time for questions and answers. Depending on the number of submissions, submitters may be asked to utilize an alternate time format.
The submission process
Please submit your proposals at
https://penta.fosdem.org/submission/FOSDEM21
If you already have a Pentabarf account (for example as a result of having submitted a proposal in the past), make sure you use it to log in and submit your proposal. Do not create a new account if you already have one.
Please include the following information with your submission:
https://penta.fosdem.org/submission/FOSDEM21
If you already have a Pentabarf account (for example as a result of having submitted a proposal in the past), make sure you use it to log in and submit your proposal. Do not create a new account if you already have one.
Please include the following information with your submission:
- Abstract- Preferred Session length- Speaker bio- Link to any hardware / code /slides for the talk
When you submit your proposal (creating an "Event" in Pentabarf), make sure you choose the "Open Source Computer Aided Modeling and Design" in the track drop-down menu. Otherwise, your proposal may go unnoticed. Fill in at least a title and abstract for the proposed talk and a suggested duration. Keep in mind that much of the value in these meetings comes from the discussions, so please allot at least 20% of the talk time for questions and answers.
Important dates
- Call for papers available: 2 December 2020Recordings
- Call for participation closes: 20 December 2020
- Devroom schedule available: 24 December 2020
- Talk recording uploads due: no later then 14 January 2020
- Devroom day: Sunday 7 February 2021 (09:00 to 17:00)
Because this year's conference will be fully virtual, all talks must be pre-recorded. These will be verified for sound and video quality prior to the conference.
Each accepted talk will have a dedicated chaperone to help you through the process of recording, encoding and uploading your talk.
The recordings will be published under the same license as all FOSDEM
content (CC-BY).
content (CC-BY).
open-hardware-devroom@lists.fosdem.org
https://lists.fosdem.org/listinfo/open-hardware-devroom
Dec 2, 2020
Dec 1, 2020
[paper] THz characterization and modeling of SiGe HBTs
Sebastien Fregonese, Marina Deng, IEEE member, Marco Cabbia, Chandan Yadav*, IEEE member, Magali De Matos, and Thomas Zimmer, Senior Member, IEEE
THz characterization and modeling of SiGe HBTs
review (invited)
IEEE J-EDS, 2020, pp.1-1
DOI:10.1109/JEDS.2020.3036135
hal-03014869
IMS Laboratory, University of Bordeaux (F)
*Department of Electronics and Communication Engineering, National Institute of Technology Calicut (IN)
Abstract: This paper presents a state-of-art review of on-wafer S-parameter characterization of THz silicon transistors for compact modelling purpose. After, a brief review of calibration/deembedding techniques, the paper focuses on the on-wafer calibration techniques and especially on the design and dimensions of lines built on advanced silicon technologies. Other information such as the pad geometry, the ground plane and the floorplan of the devices under test are also compared. The influence of RF probe geometry on the coupling with the substrate and adjacent structures is also considered to evaluate the accuracy of the measurement, especially using EM simulation methodology. Finally, the importance of measuring above 110 GHz is demonstrated for SiGe HBT parameter extraction. The validation of the compact model is confirmed thanks to an EM-spice cosimulation that integrates the whole calibration cum deembedding procedure.
Fig: EM probe models based on Picoprobe GGB (a) 1 GHz -110 GHz, (b) WR5, (c) WR3 and d) WR2.2. In all models, white=coaxial insulator, gray=solder, yellow=metal.
A complete description of probe topology and technology is given in:
A. Rumiantsev et R. Doerner; RF Probe Technology: History and Selected Topics; IEEE Microw. Mag., vol. 14, no 7, p. 46‑58, Nov. 2013, DOI: 10.1109/MMM.2013.2280241
Aknowledgement: This work is partly funded by the French Nouvelle-Aquitaine Authorities through the FAST project. The authors also acknowledge financial support from the EU under Project Taranto (No. 737454). The authors would like to thank STM for supplying the silicon wafer.
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