[paper] Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Wooseok Lee¹, Hyunuk Kang¹, Seokgyu Choi², Sangmin Lee², Hosang Kwon³, Keum cheol Hwang¹, Kang-Yoon Lee¹ and Youngoo Yang¹

Electronics 2020, 9(4), 632

DOI: 10.3390/electronics9040632

¹Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea
²Wavice Inc., Hwaseong-si 18449, Korea
³Agency for Defense Development, Daejeon 34186, Korea

Abstract This paper presents a scaled GaN-HEMT large-signal model based on EM simulation. A large-signal model of the 10-finger GaN-HEMT consists of a large-signal model of the two-finger GaN-HEMT and an equivalent circuit of the interconnection circuit. The equivalent circuit of the interconnection circuit was extracted according to the EM simulation results. The large-signal model for the two-finger device is based on the conventional Angelov channel current model. The large-signal model for the 10-finger device was verified through load-pull measurement. The 10-finger GaN-HEMT produced an output power of about 20 W for both simulation and load-pull measurements. 

Fig: Two-finger GaN-HEMT: a) layout; b) equivalent SPICE subcircuit

Acknowledgement: The research reported in this work has been supported by ADD (Agency of Defense Development) of Korea under an R&D program (UC170025FD).

[webinar] GaN HEMT Devices Characterization Using ASM-HEMT Model

ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング

お知らせ: キーサイト・テクノロジーのウェブセミナー「ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング 」

ライブウェブセミナーの日付: 2020年10月14日

ライブウェブセミナーの時刻: 10:45 JST

The Evolution of SPICE Continues With PSPICE for TI https://t.co/gBbrLEU2NJ #semi https://t.co/moYCCqfd1Y

The Evolution of SPICE Continues With PSPICE for TIhttps://t.co/gBbrLEU2NJ#semi pic.twitter.com/moYCCqfd1Y

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October 15, 2020 at 12:16PM
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[C4P] ICMTS: April 12 - 15, 2021

34th International Conference on Microelectronic Test Structures

ICMTS: April 12 - 15, 2021

Crowne Plaza Cleveland at Playhouse Square, Cleveland, OH, USA

Looking for the best opportunity to present and discuss your ideas and results about test structures, measurements and characterization? This is your chance! Join the 34th ICMTS conference. A Tutorial Short Course will precede the main conference. Several of the best measurement, equipment design, and manufacturing experts, will participate in the equipment exhibition and presentations. The conference will bring together designers and users of test structures to discuss recent developments and future directions, in a one-track program, with convivial breaks allowing attendees to discuss and exchange viewpoints and challenges. A Best Paper award will be presented by the Technical Program Committee. The IEEE Electron Devices Society is the co-sponsor, and all presented papers will be submitted for possible inclusion on IEEE Xplore®. Original papers are solicited presenting new developments in topics relevant to ICMTS, including but not limited to, test structures, measurements, and results, in the following areas:

• Design
• Methodologies, verification
• Within-die circuits for process characterization/monitoring
• Design enablement – Characterization and validation of digital and analog libraries
• Measurement techniques
• DC, AC and RF measurements: setup, test and analysis
• Reliability test - including thermal stability, failure analysis etc.
• Statistical analysis, variability, throughput increase, smart test strategies
• Use of machine learning and AI in analysis of data sets - parameter extraction etc.
• Wafer probing, within-die measurements, in-line metrology
• Throughput, testing strategies, yield enhancement and process control tests
• Applications
• Emerging memory technologies (single cell, arrays, and application in neural networks)
• Emerging transistor technologies for digital/analog/power applications
• Photonic devices - silicon integration, new displays (OLED, µ-displays)
• Flexible electronics and sensors (organic and inorganic materials)
• M(N)EMS, actuators, sensors, PV cells and other emerging devices

The author’s abstract submission consists of up to four pages in PDF format (font-embedded). The first page should include a title, a 50-word summary, author name(s), full address, contact number, and e-mail of the lead author, and any preference for oral or poster session presentation. The body of the abstract should consist of one page of text (800 to 1000 words) and up to two pages of major figures and tables. The selection process will be based on the technical merit and will be highly weighted in favor of abstracts with high test structure content (including illustration) along with measurements and data analysis.

The abstract submission deadline is November 6, 2020.

Abstracts can be submitted via the ICMTS website http://www.icmts.net using the “Submit Abstract” link on the front page. Notice of paper acceptance will be sent to the selected authors by mid-January, 2020, with instructions for the expanded manuscript preparation for the conference proceedings. The deadline for submission of the final paper will be March 17, 2021. 

Please join the ICMTS group at www.linkedin.com/groups/3804498, if you have in interest all things test structure related.

Details of the venue, hotel, registration, etc. will be posted at the ICMTS official web site. ICMTS is currently planned to be in person with the possibility of going virtual if necessary.

For further technical information, please contact the technical program chair:Chadwin Young, University of Texas at Dallas.

General Chair:

Brad Smith NXP Semiconductors

Technical Program Chair:

Chadwin Young University of Texas, Dallas

Tutorial Chair:

Matthew Rerecich Samsung Austin Semiconductor, LLC

Equipment Exhibition Chair:

Garrett Tranquillo Celadon Systems, Inc.

Local Arrangements:

Brad Smith NXP Semiconductors

ICMTS Steering Committee:

Asian Representative:

Satoshi Habu Keysight Technologies, Japan

European Representative:

Hans Tuinout NXP Semiconductors

USA Representative:

Bill Verzi Semiconductor Test Advisor

[online] PhD Thesis Colloquium of student Mr. Biswapriyo Das

FROM: Professor Santanu Mahapatra ( শান্তনু মহাপাত্র ) 

Nano Scale Device Research Laboratory
Department of Electronic Systems Engineering (formerly CEDT)
Indian Institute of Science Bangalore
Bangalore 560012 INDIA

Dear Colleagues, 
Hope you are in good health amid this pandemic.

I would like to invite you and your team members to the online thesis colloquium of my PhD student Mr. Biswapriyo Das. In our institute, it is mandatory for a PhD student to give an open colloquium for his research work just before the thesis submission. In pre-COVID time, it used to be a physical presentation, attended by the institute community. However, during this evolving pandemic we are conducting the colloquium online. It thus gives us opportunity to invite researchers across the globe who are working on the similar problems in device-modeling .

You may find the details of the talk below. Hope to see you and your group members on 19th October at 3PM IST. MS Teams Link:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_MjhmYzJiYjAtNzY2Zi00OGU5LWFhMzgtODQyYmJmNjAzYzhl%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%228c0cf3c3-0cab-451f-a745-7b29517ae80f%22%7d

Title:  Atom-to-circuit modeling strategy for 2D transistors

Abstract: Two-dimensional (2D) materials are now being considered as viable options for CMOS (complementary metal-oxide-semiconductor) technology extension due to their diverse electronic and opto-electronic properties. However, introduction of any new material in the process integration phase of technology development in semiconductor industry is an expensive and time-consuming affair. It is also a difficult task to select an appropriate 2D material from the plethora without assessing their performance at circuit level. Thus, first-principles-based multiscale models that enable systematic performance evaluation of emerging 2D materials at device and circuit levels solely from their crystallographic information is in great demand. In this thesis, such an atom-to-circuit modeling framework, addressing three different levels of abstraction (viz. material, device and circuit), has been demonstrated.
Firstly, the model was implemented for a van der Waal's heterostructure based all-2D metal-insulator-semiconductor field-effect transistor (MISFET), comprising of vertically stacked semi-metallic graphene, insulating hexagonal boron nitride (hBN) and semiconducting monolayer molybdenum disulphide (MoS­2). Our physics-based compact model demonstrates the effects of band gap opening in graphene due to its sublattice symmetry breaking interactions with underlying hBN layer. This apart, we have also studied the effects of semiconductor doping and the band gap variation of graphene at device and circuit levels. The model equations were thereafter implemented in a professional circuit simulator using its Verilog-A interface to facilitate design and simulation of integrated circuits.
Secondly, the scope of the proposed model was further extended to capture the non-quasi-static (NQS) effects in 2D transistors operating at very high frequencies, typically greater than its intrinsic cut-off frequency fT. Taking phosphorene as a prototypical example, a multiscale NQS model was developed for 2D transistors that can predict the channel-orientation-dependent high-frequency performance of devices and circuits solely from the crystallographic information of their constituent materials. The material-specific parameters obtained from density functional theory (DFT) calculations were used to develop a continuity equation based NQS model to gain insight into the high-frequency behaviours. It was found that channel orientation has strong impact on both the low and high frequency conductances, however it affects only the high-frequency component of capacitances. The model was then implemented in industry-standard circuit simulator using relaxation-time-approximation technique and simulations of analog and digital circuits were carried out to demonstrate its applicability for near cut-off frequency circuit operation.
Finally, the idea was also exercised for modeling novel quantum materials like 2D topological insulators (TI) and it was shown that the proposed analytical approach could be useful for developing compact models of topological insulator field effect transistors. A k. p Hamiltonian based continuum model was used to unveil the bandgap opening in the edge-state spectra of finite-width monolayer 1T' molybdenum disulphide (MoS2), molybdenum diselenide (MoSe2), tungsten disulphide (WS2) and tungsten diselenide (WSe­2). It was shown that the application of a perpendicular electric field effectuates a topological phase transition and it can simultaneously modulate the band gaps of both bulk and edge-states. The tuneable edge conductance, as obtained from the Landauer-Büttiker formalism, exhibits a monotonous increasing trend with applied electric field for deca-nanometer MoS­2, whereas the trend is opposite for other cases.

References:
[1] Das, B. and Mahapatra, S., "An atom-to-circuit modeling approach to all-2D metal-insulator-semiconductor field-effect transistors", npj 2D Mater Appl 2, 28 (2018).
[2] Das, B., Sen, D. and Mahapatra, S., "Tuneable quantum spin Hall states in confined 1Tʹ transition metal dichalcogenides", Sci Rep 10, 6670 (2020).
--------------------------------------------------------
Santanu Mahapatra ( শান্তনু মহাপাত্র )
Professor
Nano Scale Device Research Laboratory
Department of Electronic Systems Engineering (formerly CEDT)
Indian Institute of Science Bangalore
Bangalore 560012 INDIA

Adjunct Faculty IIIT-Allahabad

Phone: +91-80-2293-3090
Home Page: santanu.dese.iisc.ac.in
Lab Page: nsdrl.dese.iisc.ac.in

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