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What is #FOSS? What is #OpenSource?



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Sep 25, 2020

ASCENT+ project



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#Opensource chip tech #RISC-V


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Sep 24, 2020

[paper] Ultra-High Voltage SiC IGBT

Wide-Range Prediction of Ultra-High Voltage SiC IGBT Static Performance
Using Calibrated TCAD Model
Daniel Johannesson1,2, Keijo Jacobs1, Staffan Norrga1, Anders Hallén3
Muhammad Nawaz2 and Hans-Peter Nee1,2
Materials Science Forum Submitted: 2019-09-19
ISSN: 1662-9752, Vol. 1004, pp 911-916  
DOI:10.4028/www.scientific.net/MSF.1004.911

1Division of Electric Power and Energy Systems, KTH , Sweden
2ABB Corporate Research, Västerås, Sweden
3Division of Electronics, KTH, Sweden

Abstract: In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general highpower application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.


Fig: 4H-SiC IGBT structure implemented in 2D TCAD simulator

Acknowledgment This work was funded through SweGRIDS, by the Swedish Energy Agency and ABB.

Sep 23, 2020

[paper] Multi-Bridge-Channel Field Effect Transistor

Leakage Performance Improvement in Multi-Bridge-Channel Field Effect Transistor
(MBCFET) by Adding Core Insulator Layer 
Saehoon Joung1,2, Student Member, IEEE and SoYoung Kim2, Senior Member, IEEE 
SISPAD 2019 
DOI:10.1109/sispad.2019.8870498 

1Samsung Electronics Co. Foundry Division, Yield Enhancement, Process Integration Engineering Group, Ltd Kiheung, Republic of Korea
2College of Information and Communication Engineering,Sungkyunkwan University, Suwon,Gyeounggi-do, Republic of Korea

Abstract: Altering from existing planar devices to FinFETs has revolutionized device performance, but demands of leakage and gate controllability are increasing relentlessly. Gate all around field effect transistor (GAAFET) is expected to be the next-generation device that meets these needs. This paper suggests a way to improve the gate electrostatic characteristics by adding an oxidation process to the conventional multi-bridgechannel field effect transistor (MBCFET) process. The main advantage of the proposed method is that a device with ultimate electrostatic properties can be implemented without changing the complex and expensive photo-patterning. In the proposed device, the immunity of short channel effects is enhanced in a single transistor. And the performance of ring oscillator (RO) and SRAM was confirmed to be improved by TCAD mixed-mode simulation.


FIG: MBCFET Process Flow Comparison 
 
Acknowledgement: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2017R1A2B2003240). The TCAD tools were supported by the IC Design Education Center (IDEC).