Jul 2, 2020

$1#billion market for #SiC and #GaN https://t.co/D0ukYu8BAK #paper https://t.co/BVZjWuNXlr


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July 02, 2020 at 03:43PM
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[paper] 1T-1C Dynamic Random Access Memory

1T-1C Dynamic Random Access Memory: 
Status, Challenges, and Prospects 
Alessio Spessot and Hyungrock Oh 
(Invited Paper)
IEEE TED, 67(4), 1382–1393
DOI:10.1109/ted.2020.2963911 

Abstract: This article reviews the status, the challenges, and the perspective of 1T-1C dynamic random access memory (DRAM) chip. The basic principles of the DRAM are presented, introducing the key functional aspects and the structure of modern devices. We present the most relevant historical trends for different modules of the memory chip, such as access device and storage element, reviewing some of the technological challenges faced by industry to guarantee the device shrinking imposed by the economic law. The most recent solutions introduced by the industry in modern DRAM devices for the critical elements are presented. Finally, a survey of the most critical bottleneck for future development is presented, reviewing some of the potential trends and perspectives of DRAM development.

Fig: Review of the historical evolution trend for the cell access device. Various cell access device options are shown. The 4F2 is enabled by the vertical channel. Corresponding technology nodes are included. 

Acknowledgment: The authors would like to thank the imec Core Partners Program for the support. They would also like to thank N. Horiguchi, A. Furnemont, M. H. Na, E. Dentoni Litta, R. Ritzenthaler, and M. Popovici from imec, P. Fazan and C. Mouli from Micron, and C. Kim, Y. Son, and Y. Ji from SK Hynix for the interesting discussions.

[paper] Atomistic Level Simulation of GaNFET

R. K. Nanda1, E. Mohapatra1, T. P. Dash1, P. Saxena2, P. Srivastava2, R. Trigutnayat2
and C. K. Maiti1
Atomistic Level Process to Device Simulation of GaNFET Using TNL TCAD Tools
chapter in Lecture Notes in Electrical Engineering book series (LNEE, volume 665)
doi:10.1007/978-981-15-5262-5 

1Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan, Bhubaneswar, Odisha 751030, India
2Tech Next Lab (P) Limited, Niwaz Ganj, Lucknow 226003, India

Abstract: An atomistic level process to device simulation tools developed by Tech Next Lab (TNL) is reported. Modeling of the deposition of high-quality ultrathin AlGaN epitaxial films grown on GaN substrates by molecular beam epitaxy (MBE) has been performed. The surface morphology, crystalline quality, and interfacial property of as-grown AlGaN epitaxial films on GaN substrates are studied using simulation. The epitaxial layer characterization for extract of exact carrier mobility and use of epitaxially grown material for GaN-FET device application has been demonstrated. Results obtained on the basis of process to device simulation have been calibrated with reported results.

Fig: Device structure with 25 nm thick AlGaN/GaN layer grown on SiC (100) substrate and its output Id –Vd characteristics