#paper: Q. Huo et al., "A Novel General Compact Model Approach for 7-nm Technology Node Circuit Optimization From Device Perspective and Beyond," in IEEE J-EDS, vol. 8, pp. 295-301, 2020
— Wladek Grabinski (@wladek60) March 27, 2020
DOI: 10.1109/JEDS.2020.2980441https://t.co/QrqdHdvHmT pic.twitter.com/vTr39EBQ6r
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March 27, 2020 at 10:23AM
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