I ❤️ Free Software - Valentine's Day 2020 FSFE https://t.co/bXAlq7cDmN #paper https://t.co/HdPLWXripO

I ❤️ Free Software - Valentine's Day 2020
FSFE https://t.co/bXAlq7cDmN#paper pic.twitter.com/HdPLWXripO

— Wladek Grabinski (@wladek60) February 14, 2020

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February 14, 2020 at 09:01AM
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Postdoc in Millimeter-Wave Nano-Scale CMOS Circuits for Quantum Computing; Vacancy at Department of EE and Computer Engineering, Aarhus University Deadline 15 Feb; Fixed term full-time position: 1 Apr 2020 - 31 Mar 2022 [ID: 2624] https://t.co/WzYvgHWbsL #paper https://t.co/tLZvSd5Ktn

Postdoc in Millimeter-Wave Nano-Scale CMOS Circuits for Quantum Computing; Vacancy at Department of EE and Computer Engineering, Aarhus University
Deadline 15 Feb; Fixed term full-time position: 1 Apr 2020 - 31 Mar 2022 [ID: 2624

]https://t.co/WzYvgHWbsL#paper pic.twitter.com/tLZvSd5Ktn

— Wladek Grabinski (@wladek60) February 14, 2020

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February 14, 2020 at 07:12AM
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#paper: K. Li and S. Rakheja, “Modeling and Simulation of Quasi-Ballistic III-Nitride Transistors for RF and Digital Applications,” Int. J. Hi. Spe. Ele. Syst., vol. 28, no. 01n02, p. 1940011, Mar. 2019 doi: 10.1142/S0129156419400111 https://t.co/k3Rf5UGe8w https://t.co/SrmUC66YDz

#paper: K. Li and S. Rakheja, “Modeling and Simulation of Quasi-Ballistic III-Nitride Transistors for RF and Digital Applications,” Int. J. Hi. Spe. Ele. Syst., vol. 28, no. 01n02, p. 1940011, Mar. 2019
doi: 10.1142/S0129156419400111https://t.co/k3Rf5UGe8w pic.twitter.com/SrmUC66YDz

— Wladek Grabinski (@wladek60) February 11, 2020

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February 11, 2020 at 02:55PM
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#paper: B. Liu et al., "A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5nm CMOS," in IEEE SSC Letters, vol. 3, pp. 34-37, 2020 doi: 10.1109/LSSC.2020.2967744 https://t.co/7YkX9vwaJ6 https://t.co/KO0oTZDHBV

#paper: B. Liu et al., "A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5nm CMOS," in IEEE SSC Letters, vol. 3, pp. 34-37, 2020
doi: 10.1109/LSSC.2020.2967744https://t.co/7YkX9vwaJ6 pic.twitter.com/KO0oTZDHBV

— Wladek Grabinski (@wladek60) February 11, 2020

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February 11, 2020 at 10:25AM
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ITE Piaseczno Branch, the only one Polish experimental technological line for #silicon #devices

RT @Lukasiewicz_ITE: Today, the @Lukasiewicz_pl executives met with the @Lukasiewicz_ITE management and employees. The meeting took place in the ITE Piaseczno Branch, the only one Polish experimental technological line for #silicon #devices 

https://t.co/xVB7AB9X0m#paper pic.twitter.com/vm3r1midk0

— Wladek Grabinski (@wladek60) February 11, 2020

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February 11, 2020 at 07:17AM
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