Graduate Student Meeting on Electronic Engineering

The Graduated Student Meeting on Electronic Engineering (formerly Nanoelectronics and Photonics Systems Workshop), has been an annual event, created and organized by the Universitat Rovira i Virgili (URV), in Tarragona (Catalonia, Spain) since 2003. It consists of two days of plenary talks given by invited prestigious researchers (from different countries) about selected topics related to electronic engineering and two poster sessions were PhD students in this field will present their work.

This Graduated Student Meeting has become a very useful forum for PhD students and researchers in the field of Electronic Engineering. The present edition will take place in June 19th and 20th.

This year, the Graduated Student Meeting is being sponsored by the NANOSIL European Network of Excellence.

Awards for the best student paper/posters in two categories: one category for Master students and another category for Doctoral Students.

2-pages abstracts corresponding to paper or poster presentations and plenary talks will be published in the Proceedings. The deadline for abstracts reception is June 8th.

The plenary talks will be given by the following lecturers:

Prof Juin J Liou. University of Central Florida, Orlando, FL (USA). "Protecting Microchips agains Electrostatic Discharge (ESD) Shock."

Dr Michele Penza. Italian Agency for New Technologies, Energy and Environment.
Department of Physical technologies and new materials. Research Center Brindisi (Italy). "Carbon nanotube gas sensors: chemiresistors and SAW devices."

Prof. Ettore Napoli. Department of Electronic and Telecommunication Engineering. University of Naples Federico II (Italy). "Superjunction power devices".

Dr Denis Buttard. CEA-GrenobleLaboratoire de Silicium Nanoélectronique Photonique et StructuresINAC/SP2M/SiNaPSMINATEC-BCA. 38054 Grenoble Cedex 9 (France). "Elaboration and structural investigation of the confined growth of silicon nanowires in a nanoporous matrix: application to phovoltaic cell".

Prof. Yuhua Cheng. Shanghai Research Institute of Microelectronics, Peking University (China). "Design-for-Manufacturing in Nano-CMOS Era."

Dr. Daniela Iacopino. Nanotechnology Group. Tyndall National Institute. Cork (Ireland).
"Nanocrystal-Molecule Nanostructures: Formation, Plasmonic Properties & Electrical Contacting"

Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula.
Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tàrraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

In June the weather is warm enough to go to the beaches in or around Tarragona, but comfortable enough to walk and do sightseeing in the city. Thanks to its Mediterranean climate, its clean beaches with fine and gloden sand, and its singular artistic and architectural heritage, Tarragona is one of the most important tourism hubs in Europe.

I encourage Ph D students to send abstracts and attend this interesting Meeting!

Job offer in Compact Modelling - 28 May 2009

I post here a job offer from LinkedIn, I think it may be of interest for many of you, dearest readers.... Please remember that we only copy here the offer, and that we are not related in any way to those offering the position!!
In case you are interested, kindly pass your CV immediately to gopal.svks@gmail.com / gopal@svcircuit.com

Senior Manager/Manager -Analog-RF,AMS–Malaysia
Exp-PhD / Master with 10+ , candidate should be solid in Analog,RF characterization, SPICE & compact modeling for high voltage MOS, BJT, BCD devices

Placement location –Malaysia
Position -- very urgent and need to be filled ASAP.
Interview - 2weeks altogether.
Package – Will be the best in the semiconductor industry
Type -Full time and permanent with our client..


Malaysia Responsibilities:
• Lead a team of engineers to provide Integrated Circuit Design Technology solutions.
• Supervise test-chip design for "Client" technology characterization, SPICE model generation
for RF, Analog and mixed signal active and passive devices, and development of process design
kit (PDK) for "Client" technologies.
• Review, update, and manage electrical design rule (EDR) specifications for all "Client"
technologies – accuracy and availability of up-to-date revision.
• Interface with "Client" technology development (TD), customer engineering (CE), and Fab
engineering departments to support technology development, customer support, and
manufacturing, respectively.
• Interact with marketing group to provide modeling solutions to "Client" customers.
• Follow and comply with the procedures and by-laws of "Client" Environmental Management
System (EMS).
• Review all environmental objectives, targets, and plans and ensure their implementation in
accordance to the requirements set by "Client" EMS.
Requirements:
• 10+ years of experience in managing integrated circuit Design Technology including design rule
generation, device characterization and compact modeling and industry best practices.
• Extensive knowledge of compact modeling for Analog/RF and mixed-signal technologies
including high voltage MOS, BJT, BCD devices for circuit simulation.
• Extensive knowledge of integrated passive and active components characterization and modeling.
• Good verbal/written communication skills and proven ability to work in and lead cross functional
teams.
• Proven leadership and management skills in high technology industry.
• M.S. or PhD in Electrical Engineering, Physics, or related technical fields with > 10 years relevant
experience in logic, Analog/RF, and mixed-signal device & interconnect modeling as well as CAD
to support customer design.
• Working experience in TCAD device design is added advantage