Jan 23, 2009
A post in EDN: Simulation gets speed, capacity boost
"Spice remains only part of the simulation picture as designers add RF/wireless-communications capability to an increasing array of products. And even products that offer no RF/wireless features are exhibiting RF performance as process geometries shrink, digital speeds increase, and high-speed serial-I/O ports proliferate. Furthermore, in many cases, as frequencies rise and designers squeeze more functions into smaller and smaller spaces, chip and board design cannot occur in isolation; co-design and simulation of chip, chip package, and board must take place."
If you wish to read more (which I recommend), follow the link to EDN.
Jan 15, 2009
Papers in Solid-State Electronics
Surface potential equation for bulk MOSFET, by G. Gildenblat, Z. Zhu, and C.C. McAndrew... (Don't miss this one... it's short, but interesting, mainly for starters)
PSP-SOI: An advanced surface potential based compact model of partially depleted SOI MOSFETs for circuit simulations, by W. Wu, X. Li, G. Gildenblat, G.O. Workman, S. Veeraraghavan, C.C. McAndrew, R. van Langevelde, G.D.J. Smit, A.J. Scholten, D.B.M. Klaassen and J. Watts... this is another must, since it's the presentation in society of the latests efforts in SOI modelling of the PSP team!
Modeling short-channel effects in channel thermal noise and induced-gate noise in MOSFETs in the NQS regime, by Sunil Vallur and R.P. Jindal
A charge-based compact model for predicting the current–voltage and capacitance–voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETs, by Feilong Liu, Jian Zhang, Frank He, Feng Liu, Lining Zhang, and Mansun Chan
Analytic resolution of Poisson–Boltzmann equation in nanometric semiconductor junctions, by Hugues Murray... another must, with well explained mathematics...