Showing posts with label mismatch evaluation. Show all posts
Showing posts with label mismatch evaluation. Show all posts

Nov 4, 2020

[paper] Local Variability Evaluation on Effective Channel Length

Juan Pablo Martinez Brito, Graduate Student Member, IEEE, 
and Sergio Bampi, Senior Member, IEEE
Local Variability Evaluation on Effective Channel Length
Extracted with Shift-and-Ratio Method
IEEE TED, vol. 67, no. 11, pp. 4662-4666, Nov. 2020
doi: 10.1109/TED.2020.3017178

Abstract: In this study, the local variation of the effective channel reduction parameter (ΔL=Lm−Leff) of a MOSFET is extracted by means of the traditional shift-and-ratio (SAR) method. ΔL is then correlated with the threshold voltage difference (ΔVTH) between the device under test (DUT) and the reference device. It is demonstrated that there exists an optimal VG range for extracting reliable values of L through the SAR method. Statistical data analysis shows that for R≈ (Llong/Lshort)≈25, better results are achieved since the value of σ(ΔL) varies typically as the reciprocal 1/√ W. The test structure used in this work is a Kelvin-based 2-D addressable MOSFET matrix implemented in 180-nm bulk CMOS technology. The sample space is of 2304 devices divided into nine subgroups of 256 same size closely placed nMOSFETs.
Fig: (a) Full circuit micrograph (b) MOSFET Matrix structure (c) Zoomed-in view at DUTs 

Acknowledgment: The authors would like to thank and acknowledge the Brazilian public company CEITEC S.A. Semiconductors for the measurement infrastructure, the CAD Support Center (NSCAD) at Federal University of Rio Grande do Sul (UFRGS) for electronic design automation (EDA) support, and Silterra Inc. for the silicon prototyping services.