OSOC Initiative

One Student One Chip Initiative

Participators: Frontier System Laboratory, Architecture Laboratory

Status: Ongoing

The OSOC project guides students to design a tape-out open-source processor by combing EE with CS. It can help students improve their capacity of implementing software and hardware systems and learn how to design chips. Meanwhile, the project trains talents to be transferred to the high-performance processor "Xiangshan", open source EDA, open source IP and other teams and communities, which will continue to cultivate excellent reserve forces for advanced research and development of CS in China.

REF:

Institute of Computing Technology, Chinese Academy of Science　

No.6 Kexueyuan South Road Zhongguancun, Haidian District Beijing,China　

<https://acs.ict.ac.cn/english/projects_acs_en/202209/t20220927_46170.html>

Intern/Student in SW Eng. for Power Management f/m

Job Description: You will be responsible for developing a SW tool enabling an user friendly and efficient framework to program system-on-chip. The flexibility of our power management solution thanks to enhanced customization is indeed a critical asset requiring a reliable tool from programming definition to release. You will be part of an enthusiastic and international system engineering team located in Munich and will get in touch locally with several design and validation teams [read more...]

Your main tasks in this full time position min 5 months up to 12 months will be to:

• Create several functions/add-ons enhancing entry interface
• Develop a compiler to better explore new chip architectures-Integrate compiler output with existing tools
• Implement sanity checkers detecting
• Develop test scenarios and requirements for chip validation
• Contribute to the reporting and documentation for other teams and management

[read more...]