Md. Hasan Raza Ansari, Udaya Mohanan Kannan, and Nazek El-Atab
Silicon Nanowire Charge Trapping Memory for Energy-Efficient Neuromorphic Computing
IEEE Transactions on Nanotechnology (2023)
DOI 10.1109/TNANO.2023.3296673
SAMA Labs, CEMSE Division, KAUST, Thuwal 23955-6900, Saudi Arabia
Department of Electronic Engineering, Gachon University, Seongnam 13120, Korea
Abstract: This work highlights the utilization of the floating body effect and charge-trapping/de-trapping phenomenon of a Silicon-nanowire (Si-nanowire) charge-trapping memory for an artificial synapse of neuromorphic computing application. Charge trapping/de-trapping in the nitride layer characterizes the long-term potentiation (LTP)/depression (LTD). The accumulation of holes in the potential well achieves short-term potentiation (STP) and controls the transition from STP to LTP. Also, the transition from STP to LTP is analyzed through gate length scaling and high-κ material (Al2O3) for blocking oxide. Furthermore, the conductance values of the device are utilized for system-level simulation. System-level hardware parameters of a convolutional neural network (CNN) for inference applications are evaluated and compared to a static random-access memory (SRAM) device and charge-trapping memory. The results confirm that the Si-nanowire transistor with better gate controllability has a high retention time for LTP states, consumes low power, and archives better accuracy (91.27%). These results make the device suitable for low-power neuromorphic applications.
FIG: Schematic representation of biological and Si-nanowire charge trapping memory as an artificial synapse
