[chapter] GAA Transistors

Srivastava, Shobhit, and Abhishek Acharya

Challenges and future scope of gate-all-around (GAA) transistors

in "Device Circuit Co-Design Issues in FETs"; 

Shubham Tayal et al. (Editors)

231 CRC Press, 22 Aug 2023 - Technology & Engineering

Introduction: No doubt, FinFET technology is the slogger of today's semiconductor world. But as demand for further scaling with a desire for ultra-low-power and high-speed applications results in undesired short-channel effects, a new transistor is required. This is where gate-all-around (GAA) devices come into being. The GAA structure helps to mitigate unwanted short-channel effects by enhancing channel controllability. In GAAFETS, the channel surrounds all of its sides through a high-K and interfacial oxide layer. Thanks to science and technological innovation, the GAAFET family brings together different transistors and their competitive benefits. This chapter tries to answer why and how 3D devices emerge. In addition to the limitation of FinFET (a 3D device, gate surrounded by three sides), it further talks about the scope and challenges of different competitive GAAFET members (nanowire FET, nanosheet FET, junctionless nanosheet FET, complementary PET, and forksheet FET) of the GAAFET family. It is worth mentioning that a smaller benefit of the device performance exerts a massive performance enhancement on circuit-level applications. However, the advantages of device enhancement concurrently exaggerate the limitation of devices at circuit-level applications. So, an elaborated idea of GAAFETs holding the benefits and challenges at the circuit is also discussed here.

FIG: Structural evolution of transistors from planar to 3D forksheet FET technology