[paper] RTN and BTI statistical compact modeling

G.Pedreira^a, J.Martin-Martinez^a, P.Saraza-Canflanca^b, R.Castro Lopez^b, R.Rodriguez^a, E.Roca^b, F.V.Fernandez^b, M.Nafria^a 

Unified RTN and BTI statistical compact modeling from a defect-centric perspective

Solid-State Electronics

Available online 25 June 2021, 108112

In Press, Journal Pre-proof

DOI: 10.1016/j.sse.2021.108112

a Universitat Autònoma de Barcelona (UAB), Electronic Engineering Department, REDEC group. Barcelona, Spain
b Instituto de Microelectrónica de Sevilla, IMSE-CNM, CSIC and Universidad de Sevilla, Spain

Abstract: In nowadays, deeply scaled CMOS technologies, time-dependent variability effects have become important concerns for analog and digital circuit design. Transistor parameter shifts caused by Bias Temperature Instability and Random Telegraph Noise phenomena can lead to deviations of the circuit performance or even to its fatal failure. In this scenario extensive and accurate device characterization under several test conditions has become an unavoidable step towards trustworthy implementing the stochastic reliability models. In this paper, the statistical distributions of threshold voltage shifts in nanometric CMOS transistors will be studied at near threshold, nominal and accelerated aging conditions. Statistical modelling of RTN and BTI combined effects covering the full voltage range is presented. 

The results of this work suppose a complete modelling approach of BTI and RTN that can be applied in a wide range of voltages for reliability predictions.