Friday, May 7, 2010

3rd International Workshop on Copact TFT Modeling for Circuit Simulation: Deadline Extended

The 3rd International Workshop on Compact Thin-Film Transistor Modeling for Circuit Simulation (C-TFT) will be held in Tarragona on July 2 2010.

Deadline for abstract submission has been extended:

- Deadline for abstract submission: May 19, 2010
- Notification of acceptance: May 26, 2010
- Camera-ready version: Jun 18, 2010

The C-TFT Workshop will provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by the Universitat Rovira i Virgili in collaboration with the IEEE EDS Compact Modeling Technical Committee and the University College London.

A partial list of the areas of interest includes:

- Physics of TFTs and operating principles
- Compact TFT device models for circuit simulation
- Model implementation and circuit analysis techniques
- Model parameter extraction techniques
- Applications of compact TFT models in emerging products
- Compact models for interconnects in active matrix flat panels

Prospective authors are invited to submit an abstract of up to 500-word to:

This event will be held in coordination with the Training Courses on Compact Modeling (June 30-July 1) and the Graduate Student Meeting on Electronic Engineering (June 28-29).

Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tarraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

1 comment:

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