The SINANO-NANOSIL Workshop will take place in Athens on September 18th, 2008, during the ESSDERC-ESSCIRC Conference.
This Workshop, continuation of the former SINANO Workshop, is a very valuable discussion forum in the area of nanoelectronics devices.
The aim of this Workshop is to present the status and trends of CMOS and beyond-CMOS nanodevices for terascale ICs and to establish a discussion forum in the field of nanoelectronics devices.
The SINANO-NANOSIL Workshop is supported by the SINANO Institute, which is a new European entity created by the main laboratories of the European academic community working in nanoelectronics, and by the European Network of Excellence NANOSIL which targets Silicon-based Nanodevices and is funded by the European Commission for the 7th Framework Programme, from 2008 to 2011. The former SINANO Workshop was funded by the prebvious Network of Excellence, called SINANO.
The program of the SINANO-NANOSIL Workshop consists of several presentations given by a number of representatives of NANOSIL partners:
9:00 Limitations in future gate stack materials
9:30 Metallic source/drain for advanced MOS architectures: from material engineering to device integration
10:00 Coffee break
10:30 Advanced Memory devices using multi-gate and 3D structures
11:00 Tunnel FET or Ferroelectric FET to achieve a sub-60mV/decade small swing switch
11:30 Electron Transport in Graphene Quantum Dots and Quantum Point Contacts
University of Manchester
13:30 Variability in Nanoscale CMOS and Nanowires
University of Glasgow
14:00 Simulation of gate leakage currents in UTB MOSFETs and Nanowires
14:30 3D quantum transport simulations of Si Nanowires: impact of elastic and inelastic scattering
IMEP-LAHC, Grenoble INP-Minatec
15:00 Deterministic solution of the 1D Boltzmann transport equation
G. Baccarani, E. Gnani, A. Gnudi and S. Reggiani
15:30 End of the Workshop