Wednesday, 22 July 2009

9:00 Limitations in future gate stack materials

O. Engstrom

Chalmers University

9:30 Metallic source/drain for advanced MOS architectures: from material engineering to device integration

E. Dubois,

IEMN

10:00 Coffee break

10:30 Advanced Memory devices using multi-gate and 3D structures

B. DeSalvo

LETI

11:00 Tunnel FET or Ferroelectric FET to achieve a sub-60mV/decade small swing switch

A. Ionescu

EPFL

11:30 Electron Transport in Graphene Quantum Dots and Quantum Point Contacts

L. Ponomarenko
University of Manchester

12:00 Lunch

13:30 Variability in Nanoscale CMOS and Nanowires

A. Asenov

University of Glasgow

14:00 Simulation of gate leakage currents in UTB MOSFETs and Nanowires

A. Schenk,

ETH-Zentrum

14:30 3D quantum transport simulations of Si Nanowires: impact of elastic and inelastic scattering

M. Pala

IMEP-LAHC, Grenoble INP-Minatec

15:00 Deterministic solution of the 1D Boltzmann transport equation

G. Baccarani, E. Gnani, A. Gnudi and S. Reggiani

ARCES-IUNET

15:30 End of the Workshop

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