Wednesday, 10 June 2009

International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation


The Second International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation will be held at the University College London (UCL) in London (UK) on September 25 2009.

This workshop is intended to provide a forum for discussions and current practices on compact TFT modeling. The workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in collaboration with IEEE UCL-Cambridge University EDS/LEOS Chapter joint chapter that is in the process of formation. Topics include include:

• Physics of TFTs and operating principles
• Compact TFT device models for circuit simulation
• Model implementation and circuit analysis techniques
• Model parameter extraction techniques
• Applications of compact TFT models in emerging products
• Compact models for interconnects in active matrix flat panels

The deadline for Abstract Submission is July 15 2009.

Prospective authors should submit a 500-word abstract to: m.bauza@ucl.ac.uk

If their abstract is accepted, the authors will be invited to submit of a 4-page paper to be included in proceedings. The deadline is August 15, 2009.

This is the only workshop especifically devoted to the compact modeling of TFT!

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