Dec 20, 2018

DEVSIM 1.0.0 Release #Opensource, #DEVSIM uses finite volume methods to predict behavior of semiconductor devices. In addition to drift-diffusion equations, the density-gradient method can be used to account for quantum effects near boundaries. https://t.co/q4fiJ9IMWK


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December 20, 2018 at 10:49AM
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Dec 19, 2018

Compact Transistor Modeling with Radiation Effects

A Radiation-Hardened Instrumentation Amplifier for Sensor Readout Integrated Circuits in Nuclear Fusion Applications

Kyungsoo Jeong 1, Duckhoon Ro 1, Gwanho Lee 2  Myounggon Kang 2* and Hyung-Min Lee 1*

1 School of Electrical Engineering, Korea University, Seoul 02841, Korea; jksoo2002@korea.ac.kr (K.J.); roduckhoon@korea.ac.kr (D.R.)
2 Department of Electronics Engineering, Korea National University of Transportation, Chungju 27469, Korea; ghlee@ut.ac.kr

* Correspondence: mgkang@ut.ac.kr (M.K.); hyungmin@korea.ac.kr (H.-M.L.); Tel.: +82-43-841-5164 (M.K.); +82-2-3290-3219 (H.-M.L.)

Abstract: A nuclear fusion reactor requires a radiation-hardened sensor readout integrated circuit (IC), whose operation should be tolerant against harsh radiation effects up to MGy or higher. This paper proposes radiation-hardening circuit design techniques for an instrumentation amplifier (IA), which is one of the most sensitive circuits in the sensor readout IC. The paper studied design considerations for choosing the IA topology for radiation environments and proposes a radiation-hardened IA structure with total-ionizing-dose (TID) effect monitoring and adaptive reference control functions. The radiation-hardened performance of the proposed IA was verified through model-based circuit simulations by using compact transistor models that reflected the TID effects into complementary metal–oxide–semiconductor (CMOS) parameters. The proposed IA was designed with the 65 nm standard CMOS process and provides adjustable voltage gain between 3 and 15, bandwidth up to 400 kHz, and power consumption of 34.6 µW, while maintaining a stable performance over TID effects up to 1 MGy.

Electronics 2018, 7, 429; doi:10.3390/electronics7120429
Received: 22 November 2018; Accepted: 9 December 2018; Published: 12 December 2018

Why #NASA #opensource the #Rover https://t.co/BtUmzR7hzr


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December 19, 2018 at 07:41AM
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Dec 18, 2018

ESSDERC/ESSCIRC 2019 Conference Kraków, POLAND - 1st Call for Papers

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ESSDERC/ESSCIRC annual Conference is the most important European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
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ESSCIRC tracks:
Analog
Data Converters
RF and mm-Wave
Frequency Generation
Wireless and Wireline Systems
Sensors, Imager and Biomedical
Digital, Security and Memory
Power Management
ESSDERC tracks:
CMOS Devices and Technology
Opto-, Power and Microwave Devices
Physical Modeling of Materials and Devices
Compact Modeling of Devices and Circuits
Memory Devices and Technology
Emerging non-CMOS Devices and Technologies
Sensor Devices and Technology
 
Post-conference publications
All accepted ESSDERC and ESSCIRC papers will be included in the conference proceedings and posted on IEEE Xplore after the conference.
Co-publication of qualified papers in SSC-L
Upon acceptance, outstanding ESSCIRC papers will be invited to submit to a Special Issue of IEEE Solid-State Circuit Letters (SSC-L, 4 pages format) on the ESSCIRC, subject to additional editorial and quality reviews. Publication on IEEE Xplore of the SSC-L Special Issue is timed to be September 1, 2019
Special JSSC issue
Authors of outstanding papers will be invited to submit their work to a Special Issue of IEEE Journal of Solid-State Circuits (JSSC, up to 10-12 pages format) on the ESSCIRC to appear in July 2020, with an opportunity to provide additional material, such as mathematical analysis, in-depth circuit description, more experimental results and benchmarking data.
Special J-EDS issue
Authors of selected outstanding ESSDERC papers will be invited to submit their work to the special issue of IEEE Journal of the Electron Devices Society. The authors will be asked to revise the conference version of the paper by adding at least 30% new material. All manuscripts will undergo additional editorial and quality review process.
 
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Technical Co-Sponsorship

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ESSDERC Financial Sponsor

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ESSCIRC Financial Sponsor

 
ORGANIZERS
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DIAMOND SPONSOR
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CALL FOR PAPERS



All submissions must be received by 8th April 2019


PAPER SUBMISSION


Manuscript guidelines as well as instructions on how to submit electronically will be soon available on the Conference website. Papers must not exceed four A4 pages with all illustrations and references included.

Papers submitted for review must clearly state:

    - the purpose of the work
    - how and to what extent it advances the state-of-the art
    - specific results and their impact


After selection of papers, the authors will be informed about the decision of the Technical Program Committee by e-mail by 31th May 2019.


At the same time, the complete program will be published on the Conference website. An oral presentation will be given at the Conference for each accepted paper. No-shows will result in the exclusion of the papers from any conference related publication.

The submitted final PDF files should be IEEE Xplore compliant.


For each paper independently, at least one co-author is required to register for the Conference (one registration-one paper policy).


ESSDERC
49th European Solid-State Device Research Conference

ESSCIRC 45th European Solid-State Circuits Conference

September 23-26, 2019
Kraków, POLAND


https://esscirc-essderc2019.org

LOCAL SCIENTIFIC SECRETARIAT


Krzysztof Kasinski (AGH UST, PL)
krzysztof.kasinski@agh.edu.pl
Robert Szczygiel (AGH UST, PL)
robert.szczygiel@agh.edu.pl


ESSDERC
/ESSCIRC 2019
ORGANIZING SECRETARIAT


Foundation for AGH
University of Science and Technology

www.fundacja.agh.edu.pl
e-mail
: kf@agh.edu.pl
Anna Inglot – Conference Manager
phone: +48 504 004 517

 
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Dec 13, 2018

IEEE Cledo Brunetti Award 2018 presented to Prof.Dr. Siegfried Selberherr


One of the founders of modern Technology Computer Aided Design (TCAD), Siegfried Selberherr has provided modeling and software development tools invaluable to the continued miniaturization of semiconductor devices. TCAD involves the use of computer simulation to develop and optimize semiconductor processing technologies. Selberherr developed MINIMOS for two-dimensional predictive simulation of the electrical characteristics of miniaturized devices to understand and control the short-channel effects and doping profiles encountered as device sizes shrink. MINIMOS was later enhanced for three-dimensional simulation to address energy transport and interface physics. He also created the ZOMBIE and PROMIS simulators, which incorporated mesh generation and programming interfaces. Selberherr then developed the Vienna Integrated System for TCAD Applications (VISTA) to combine both process and device simulation tools in a common framework. An IEEE Fellow, Selberherr is a professor with the Institute for Microelectronics at the Technische Universität Wien, Vienna, Austria.